邱瀚洋 / Jeffrey Chiu
Have experience in Digital IC design and Parallel Computing(HPC).
Software and firmware engineer
Taipei, TW
[email protected]
學歷 Education
National Taiwan University of Science and Technology,
Electronic and Computer Engineer，2018 - 2020
Fu Jen Catholic University, Electrical engineering，2015 - 2018
技能 Skills
Programming
- C/C++, Verilog
- CUDA, SPICE, Cadence
- Parallel Computing
Major Coarse
- Computer Algorithm
- Machine Learning
- CMOS,IC Design
- FPGA Design
Language License
- TOEIC 725
經歷 Experience
National Science Council Research Scholarship，2019 / 09 - 2020/09
Assist professor to verify algorithms and develop algorithm.
Industry-Academia Cooperation，2019 / 01- 2019 / 08
Maintain reliability of HW and develop the Communication algorithm.
Independent Study，2017 / 03 - 2018 / 12
Design full custom time-to-digital converter and complete the verification and layout stage.
