• Develop and maintain toolchain(debugger) for RISC-V CPUs
• Develop and manage the automatic integration system (Required Python/TCL)
• Develop Flash program utils for Evaluation Board
• Develop in-house tracing decoder (Required SQL/Python)
• Port and optimize Binutils for RISC-V CPUs.

Nice to have:

• Experience with Jenkins Build System
• Experience in development and management of CI/CD flow/system with github/gitea

科系要求

• 資訊工程相關,電機電子工程相關

擅長工具

• Linux/Github/C/C++/Python/TCL

其他條件

•  Good knowledge on computer architecture
•  Proficient in C/C++ and Linux environment