• Develop robust 3DIC PDN considering PDN impacts
• Build and analyze 3DIC IR results and propose solutions
• Define area-efficient stacking possibilities, robust PG structure for different IP styles
• Provide quick assessment to IR severity and improved approaches
• Explore EDA tool new features and introduce to project team

Min Qualification:

• 2+ year experience with IR-drop simulations, optimization and correlation
• Basic understanding of 3DIC PDN requirements
• Experienced in fixing IR/EM violations w/ physical optimization
  

Preferred Qualification:

• Experienced with power integrity simulation flow buildup in SoC or 3DIC
• Hands-on experiences in PG scripting, e.g., PSDL/PNS
• Proficient scripting skill for data collection and analysis (Shell, Python)
• Experienced in optimizing PG grid structures considering tradeoff between metal layers and electrical spec