1 Knowledge of timing sign-off fundamentals : signal integrity analysis, cross-talk, and OCV (AOCV, POCV) effects, etc. Experience using timing sign-off tools : PrimeTime/Tempus/HSPICE .
Experience in design margin modeling, including CCS/AOCV/POCV/LVF is a plus"
2 Experience with IR signoff tools like Redhawk-SC, Redhawk, Voltus. Experience in Methodology Development .
3 Understanding of programming fundamentals and concepts. Proficient programming skills in Python, Tcl , Perl .
4 Ability to collaborate effectively with different teams . Good communication to describe issues accurately to management.
4 Familiar with timing/IREM sign-off factors : OCV/IR/thermal/Reliability , and spice simulation. Experience in on-die sensor design is a plus
5 Experience in exploring and defining new process node sign-off criterion : N7/N5/N3/3DIC is a plus
6 Familiarity with gate level design flows, such as PGB , place-and-route, schematic/layout design, RC extraction, physical verification is