Applications for this position are currently paused

DV Methodology Engineer

Save
Job updated over 1 year ago

Job Description

We are heavily recruiting talents and professionals in DV, EDA, and AI/ML fields to join our force to conquer new heights in chip complexity!

As one of the world’s top IC design companies, MediaTek is constantly pushing the capabilities of chips to the limits. Our newest SoCs and ASICs are wildly sophisticated, packed with industry-leading technologies built by thousands of chip designers. With great design power comes great verification responsibilities. Our team, as a part of the verification force, has put major efforts into creating innovative and robust strategies to fulfill these responsibilities. To ensure high design quality for first silicon success, we have implemented a complete suite of functional and low-power test plans and benches across all design scopes, from IPs to SoC integrations. Furthermore, we have been collaborating with EDA tool providers and academic institutions on leveraging new verification technologies, including emulation, AI tuning, and formal methods, many of which have improved the traditional workflows by orders of magnitude. We also keep challenging ourselves to develop in-house verification tools and platforms to accelerate test regressions and track verification progress more efficiently. All these efforts ultimately lead to our success in delivering high-quality chips over the years.

Requirements

As a member of our team, you will be a part of that success. We value a wide range of skills and experiences across DV, EDA, and AI/ML fields, especially one or multiple in the below:

  1. ARM-based SoC Design
  2. Chip design flow, EDA tools, and project management.
  3. SystemVerilog & UVM, constraint random verification including assertion.
  4. Formal Methods (Formal Property Verification, Formal Coverage, Formal Sign-Off Flow, etc…)
  5. Scripting Languages (Shell/Python/Perl/Tcl)
  6. C++/Algorithms/AI & ML

If you are a DV/designer and look forward to expanding your vision; Or,
If you are an OOP programmer and look forward to stepping into the IC design field.

You are very welcome.

DV personality reference: https://semiengineering.com/the-verification-mindset/

View all jobs
View all jobs
Save
3
50,000 ~ 200,000 TWD / month
Personal Invitation Link
This is your personal referral link for job invitation. You'll receive an email notification when someone applied for the position via your job link.
Share this job
Logo of MediaTek 聯發科技.

About us

聯發科技成立於1997年,透過持續投資先進製程與前瞻技術,現已成長為全球領先的IC設計公司,提供涵蓋智慧手持裝置、智慧家庭應用、無線連結技術及物聯網產品等多個領域的系統晶片整合解决方案(SoC),並居市場領先地位。聯發科技一年約出貨15億顆晶片落實在上億台的終端產品在全球各地上市。聯發科技提供高度整合與創新性的晶片設計方案,不僅協助製造商優化供應鏈及縮短新產品開發時間,還利於其在全球成熟及發展中市場建立競爭優勢。

聯發科技致力讓科技產品更普及,因為我們相信科技能夠改善人類的生活、與世界連結,每個人都有潛力利用科技創造無限可能(Everyday Genius)。了解更多訊息,請瀏覽:www.mediatek.com.


Team

Avatar of the user.
HR
Avatar of the user.
HR
Avatar of the user.
HR
Avatar of the user.
HR
Avatar of the user.
HR

Jobs

Full-time
Mid-Senior level
1
35K ~ 200K TWD / month
Save

Full-time
Mid-Senior level
1
35K ~ 200K TWD / month
Save

Full-time
Mid-Senior level
1
35K ~ 200K TWD / month
Save