We are looking for a Senior ASIC Engineer who is familiar with IP design and verification.
What you'll be doing:
• Design, build and deliver NVIDIA Security Controller IP to the NVIDIA GPU and NVIDIA Tegra SOC. This IP is to provide a Secure Execution Environment for some applications which require high security running on NVIDIA GPU or Tegra chips.
• You will be participated in every phase of the IP design. From feature define, RTL coding, to RTL code quality check and synthesis of this IP. Besides this IP’s own function, you will also need to talk with other GPU/Tegra teams to understand how to make this IP work properly with other modules on the chip.
What we need to see: • BS / MS in electrical / computer engineering and related. • 3+ years working experience, MS preferred. • Strong design/implementation skills in Verilog, familiar with makefile, c++, Perl. • Familiar with frontend ASIC design flow including RTL design, synthesis, Formality check, and timing check. • Fluent oral English and excellent communication skills. Ways to stand out from the crowd: • Experience on ARM based SOC design. • Familiar with AXI/APB protocol. • Have the experience of security sub-system design. • Strong at C++, Makefile, Perl, or Python besides Verilog HDL.