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Logo of CakeResume Headhunting Recruitment Service.
2.5M ~ 3.5M TWD / year
5 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
1. ASIC Design or IP Integration 2. Familiar with Digital front-end EDA tool.
ASIC
ASIC logic design flow
Digital IC Designer
1.8M ~ 2.5M TWD / year
3 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
面板驅動IC或SOC設計 影像處理與影像壓縮設計 高速介面數位控制(如MIPI/ISP等)
IC Designer
Top integrator
SoC
1.8M ~ 3M TWD / year
1 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
工作內容 Knowledge of System Verilog, digital simulation and debug. Exposure to UVM is desired. Familiar with USB design is a plus. DV Experience: 6~10 years 薪資架構 13個月計算, RSU 另計
Design Verification
DV
Systemverilog
4M ~ 5M TWD / year
6 years of experience required
Managing 1-5 staff
Logo of CakeResume Headhunting Recruitment Service.
1.Micro-architecture / RTL design, simulation and verification 2.Chip integration, algorithm implementation or interface design. 3.Familiar CDC, synthesis, formality and STA flow 4. Familiar with FPGA integration, synthesis and verification. 5. Familiar with USB/ High-speed IO related project design is a plus
Digital IC Designer
IC design
Memory
1.5M ~ 2.5M TWD / year
3 years of experience required
No management responsibility
Logo of Morgan Philips Group.
【工作內容】 Maintain並整合USB3.2/USB4/PCIE MAC相關IP與Peripheral Design 驗證USB3.2/USB4/PCIE相關IP
1M ~ 3M TWD / year
1 years of experience required
No management responsibility
Logo of 力旺電子 eMemory.
歡迎至力旺招募官網註冊,直接投遞履歷: https://recruit.ememory.com.tw/ 1. 密碼演算法開發 2. 數位電路設計 (RTL) 3. 數位電路驗證 (UVM) 4. FPGA建置整合及驗證 -------------------------------------------------------------------------- 1. Crypto algorithm development 2. RTL design 3. UVM verification 4.
Linux
UNIX
40K+ TWD / month
3 years of experience required
No management responsibility
Logo of 晶豪科技 ESMT.
1. 設計感測處理器晶片的數位電路: 1) FIR/IIR digital filter design and implementation. 2) 32bit MCU AHB/DMA/UART/I2C/SPI/Timer/RTC/WDT/PIT/GPIO design. 3) digital/analog integration and co-simulation . 4) MAC design and optimization. 5) sensor algorithm development. 2. 開發測試程式: 數位
60K ~ 200K TWD / month
1 years of experience required
No management responsibility
Logo of 浦飛爾科技有限公司.
1.Familiar with RTL design & simulation 2.Familiar with FPGA prototype & emulation 3.Familiar with Verilog coding & ASIC design flow 4.Familiar with Analog and digital co-simulation 5.Familiar with Design documentation 6.Experience in MCU 7.Experience in ADC/DAC is a plus 8.Experience in low poer design flow is a plus 孰悉以下工具: 熟悉 Verilog coding, 與 ASIC design flow 熟悉
780K ~ 2.34M TWD / year
No management responsibility
Logo of 宏正自動科技股份有限公司.
專業培訓與指導,深入各式影像介面應用,並參與各項產品規格及系統設計規劃。成為專業的數位 IC 研發工程師,與我們一同開創科技趨勢新局! 【工作內容】 As a IC Design Engineer, you will design, implement and verify products that use FPGAs and/
40K ~ 80K TWD / month
No requirement for relevant working experience
No management responsibility

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