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Logo of WASAI Technology.
This internship shall last at least 4 months at full-time or 2-4 days per week part-time. Please make sure you will be able to complete this period before sending your application. * Studying and developing RTL code using Verilog to accelerate kernels for Big Data platforms * System debug & Validation of FPGA prototype systems * Performance analysis and tuning of workloads on heterogeneous platform
台灣台北市
200 ~ 500 TWD / hour
No requirement for relevant working experience
No management responsibility
Logo of VICI Holdings 威旭資訊有限公司.
VICI Holdings 威旭資訊是一間專注於高頻、造市及套利交易的公司,我們進行量化研究並追求更好的交易策略。擁有領先全台的軟體研發團隊,並具備華爾街等級的FPGA設計技術,據此打造低延遲全自動交
FPGA
Verilog
100台灣台北市中正區
75K ~ 100K TWD / month
No requirement for relevant working experience
No management responsibility
Logo of WASAI Technology.
* Design and develop RTL for Big Data platform. * Defines and documents RTL changes required for emulation/FPGA. * Tests and debugs the emulation/FPGA model and collaterals. * Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform. *You will join a growing team of IC design engineering professionals and have a real opportunity to have your hardware solutions embraced and to demonstrate your coaching and mentoring skills
OpenCL
Verilog
VHDL
台灣台北市
80K ~ 200K TWD / month
No requirement for relevant working experience
No management responsibility
Logo of VICI Holdings 威旭資訊有限公司.
VICI Holdings 威旭資訊是一間專注於高頻交易、造市及套利交易的公司,我們進行量化研究並追求更好的交易策略。擁有領先全台的軟體研發團隊,並具備華爾街等級的FPGA設計技術,據此打造低延遲全自
FPGA
Verilog
100台灣台北市中正區
100K ~ 150K TWD / month
5 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
碩士以上;電機、電機與控制、電信、電子相關科系畢業為主 需具備5年以上相關工作經驗 熟悉C、Verilog及一般IC設計流程,有數位 IC設計經驗或FPGA使用經驗,或通訊網路電路設計開發經驗者為佳 具數
Ethernet Switch
Switch
IC design
Hsinchu, Hsinchu City, Taiwan
2M ~ 3M TWD / year
5 years of experience required
No management responsibility
Logo of ASML Taiwan 台灣艾司摩爾.
Introduction to the job Be a FPGA firmware design engineer and join the world’s most advanced electron beam defect inspection equipment development. Responsible for e-Beam inspection sustaining system improvement project, customer special request, and issue investigation. Firmware design support for new system and tool development. Product quality, reliability, and manufacturability improvement. Role and responsibilities FPGA HDL firmware design and development. Integrate and simulate RTL code f
台灣台南市東區臺南
Regular earnings reach NT$40,000
No requirement for relevant working experience
No management responsibility
Logo of Công ty Cổ phần Phần mềm nhúng Nata.
- Thực tập thiết kế vi mạch phần cứng trên FPGA trên cơ sở tìm hiểu, quan sát và tham gia một phần dự án thực tế - Tích lũy năng lực xây dựng giải pháp, thiết kế hệ thống, tích hợp và kiểm thử hệ thống trên môi trường simulation và môi trường hệ thống mạch thực tế - Tiếp cận với các ý tưởng sáng tạo và công nghệ hiện đại Quyền lợi: - Có thể nhận lương thực tập nếu
Embedded Linux
C/C++
SystemC
Hà Nội, Việt Nam
1 ~ 2M VND / month
No requirement for relevant working experience
No management responsibility
Logo of 浦飛爾科技有限公司.
1.Familiar with RTL design & simulation 2.Familiar with FPGA prototype & emulation 3.Familiar with Verilog coding & ASIC design flow 4.Familiar with Analog and digital co-simulation 5.Familiar with Design documentation 6.Experience in MCU 7.Experience in ADC/DAC is a plus 8.Experience in low poer design flow is a plus 孰悉以下工具: 熟悉 Verilog coding, 與 ASIC design flow 熟悉
114台灣台北市內湖區
780K ~ 2.34M TWD / year
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
1.Micro-architecture / RTL design, simulation and verification 2.Chip integration, algorithm implementation or interface design. 3.Familiar CDC, synthesis, formality and STA flow 4. Familiar with FPGA integration, synthesis and verification. 5. Familiar with USB/ High-speed IO related project design is a plus
Digital IC Designer
IC design
Memory
Taipei, Taiwan
1.5M ~ 2.5M TWD / year
3 years of experience required
No management responsibility
Logo of Morgan Philips Group.
Job Responsibilities: Engage in RTL/Digital circuit design, synthesis, and simulation/verification. Conduct FPGA synthesis and verification processes. Manage chip integration, algorithm implementation, and interface design. Generate test patterns.
300台灣新竹市
1M ~ 3M TWD / year
3 years of experience required
No management responsibility

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