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Andes Custom Extension™ (ACE) is an innovative technology that lets customers create their own powerful custom instructions for domain-specific applications. See more information here: http://www.andestech.com/en/products-solutions/andes-custom-extension/. You will develop functional verification infrastructure and create test patterns to ensure functional correctness of a design. You will learn and use CPU domain knowledge as well as ACE specifications to develop test

帶領CPU核心的設計與驗證團隊，須具備以下技能: 1. Good communication and leadership skill 2. Familiar with computer architecture and performance trade-offs 3. Familiarity with Linux environment

CPU核心或其周邊bus/debug/trace模組的設計與驗證。 工作內容包含微結構設計，RTL撰寫，除錯與維護。

We are looking for a senior engineer to be part of the mixed-signal design team building next generation NVLINK. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. You will be responsible for the development and implementation of high speed interfaces, including TX/RX/Clocking/PLL. You will have

We are now hiring for a Senior Logic and Digital Circuit Design Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only

1.類比IP設計(Bandgap,OPAMP,ADC,DAC,PLL,Charge Pumping等) 2.熟悉hspice,Co-Sim等simulation tools,具晶片整合經驗佳

[Responsibilities] - Work with a team to: 1、Plan design architecture. 2、Develop high quality digital design. 3、Be familiar with IC design flow. 4、In-house core algorithms' module design - Professional Experience： 1、Experienced in image/video module design 2、Experienced in SoC front-end integration flow [Qualifications] - Minimum Qualifications: 1、Experienced in Verilog RTL language 2、Experienced in digital IC design front-end flow 3、Experienced in CAD tool usage such as simulation tool

[Responsibilities] - Work with a team to: 1、Plan design architecture. 2、Develop high quality digital design. 3、Be familiar with IC design flow. 4、In-house core algorithms' module design - Professional Experience： 1、Experienced in image/video module design 2、Experienced in SoC front-end integration flow

工作經驗 (Professional Experience) －Experienced in SoC front-end integration flow －Experienced in sign-off tools such as PTPX, DFT tools, etc. －Experienced in SoC platform/peripheral design 工作職責 (Responsibilities) －SoC integration －Execute sign-off flow －Clock controller, reset controller design

[Responsibilities] - Work with a team to: 1、Plan design architecture. 2、Develop high quality digital design 3、Be familiar with IC design flow 4、High-speed interface controller design 5、Digital PHY design - Professional Experience： 1、Experienced in SoC digital-PHY and controller design 2、Experienced in SoC front-end integration flow