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• Ensure complete device integration, including analogue, digital IPs, memories, IOs and passives as required; • Conduct full IC specification to Final Netlist activities, including ownership for the validation/characterization upon silicon arrival; • Define the implementation and simulation strategies for optimal Mixed Signal IC execution (Design and Integration); • Design from initial written specification or ‘C’ model to final DFT inserted gate level RTL creation, Synthesis, insertion of Test
DFT
Synthesis
SystemVerilog
300台灣新竹市
3.5M ~ 5M TWD / month
10 years of experience required
Managing 5-10 staff
Logo of NOVATEK 聯詠科技.
【產品線描述】 TV & Video Solution: 1. LCD TV Controller 2. Frame Rate Converter (FRC) / MEMC 3. TCON 4. LCD Monitor Controller Imaging Solution: 1. Car DVR 2. Consumer & Professional Surveillance Camera 3. Sport DV 4. Drone SoC IP design 1. 提供高速界面IP給 TV , Scaler , Tcon 等多媒體事業部使用,包含DDR / HDMI /
RTL design
Synthesis
DFT
No. 2, Hsin Ann Rd, East District, Hsinchu City, Taiwan 300
40K ~ 200K TWD / month
3 years of experience required
No management responsibility
Logo of NOVATEK 聯詠科技.
【產品線描述】 TV & Video Solution: 1. LCD TV Controller 2. Frame Rate Converter (FRC) / MEMC 3. TCON 4. LCD Monitor Controller 5. Large Format Display Controller Imaging Solution: 1. Car DVR 2. Consumer & Professional Surveillance Camera 3. Sport DV 4. Drone SoC 【職務說明】 Confirm circuit/system specification and achieve design from schematic, layout, and silicon characterization. - Mixed-signal design of deep
SerDes
CTLE
DFE
No. 2, Hsin Ann Rd, East District, Hsinchu City, Taiwan 300
40K ~ 200K TWD / month
3 years of experience required
No management responsibility
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300台灣新竹市東區
2.5M ~ 3.5M TWD / year
5 years of experience required
No management responsibility
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負責 高速 PLL 以及 Serdes 相關類比電路開發。 設計PCIe/USB/SATA相關APHY serdes電路,例如:USB4、PCIe5、25G serdes
ADC/DAC/Serds/PLL/LDO/BG/DP/HDMI/USB
USB4、PCIe5、25G serdes
PLL
300台灣新竹市
2.5M ~ 4.5M TWD / year
3 years of experience required
No management responsibility
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面板驅動IC或SOC設計 影像處理與影像壓縮設計 高速介面數位控制(如MIPI/ISP等)
IC Designer
Top integrator
SoC
台灣新竹市新竹
1.8M ~ 3M TWD / year
1 years of experience required
No management responsibility
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工作內容 Knowledge of System Verilog, digital simulation and debug. Exposure to UVM is desired. Familiar with USB design is a plus. DV Experience: 6~10 years 薪資架構 13個月計算, RSU 另計
Design Verification
DV
Systemverilog
Hsinchu, Hsinchu City, Taiwan
4M ~ 5M TWD / year
6 years of experience required
Managing 1-5 staff
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工作職責 (Responsibilities): Build & innovate on high-speed analog/mixed-signal circuits such as PCIe/DDR/HDMI... transmitter and receiver in deep sub-micron CMOS technology for integration in SoC products. Work with digital team on specification definition Create behavior model for analog/digital evaluation Compliance test for SerDes IP
Linus
台灣台北
2.5M ~ 4.5M TWD / year
1 years of experience required
No management responsibility
Logo of NOVATEK 聯詠科技.
【產品線描述】 Smart TV Solutions:提供TVSoC、MEMC/FRC及面板相關顯示裝置的控制晶片 ASIC Solutions:提供智能手機、智能電視、電競螢幕及商用顯示等產品各種ASIC解決方案 PD and Gaming Solutions:提供各種商用顯示及電競螢幕的控制
Perl
Python
FPGA
No. 2, Hsin Ann Rd, East District, Hsinchu City, Taiwan 300
40K ~ 200K TWD / month
3 years of experience required
No management responsibility
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專長是Class D Amp IP設計的類比IC設計人員協助產品研發, 且相關設計/產品經驗有 10 年以上 。 工作內容: 1. 負責HV Class D Amp新產品的評估, 包含前期的面積評估, 製程比較, 2. 以及中期的Class D Amp IP
Analog Design
Analog IC
Class-D
Hsinchu, Hsinchu City, Taiwan
3M ~ 5M TWD / year
6 years of experience required
No management responsibility

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