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Logo of CakeResume Headhunting Recruitment Service.
1. Facilitate collaboration between foundries and teams in Japan or Taiwan. 2. Maintain seamless communication channels with foundries regarding CP/FT-related updates. 3. Track product yield performance across various technologies and provide reports to headquarters. 4. Collaborate with headquarters and foundries to identify strategies for improving product yield. 5. Troubleshoot issues during mass production and collaborate with headquarters and foundries to sustain yield levels. 6. Gather tech
Foundry
Product Engineer
IC Design
2M ~ 3.5M TWD / year
3 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
Product platform HW system design integration Schematic design, PCB layout design and review RFQ/PRD research and feedback Component survey and technology study BOM creation and maintenance Circuit/system design developing , validation and debugging.
audio
Hardware Design
1.6M ~ 1.8M TWD / month
10 years of experience required
No management responsibility
Logo of NVIDIA.
NVIDIA is seeking outstanding entry-level Verification Engineers to verify the design and implementation of the next generation of PCI Express controllers for the world’s leading GPUs and SOCs by developing scalable testbench that is re-usable across different verification methodologies and environments. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing fiel
PCIE
ASIC
Verilog
2 years of experience required
No management responsibility
Logo of ASML Taiwan 台灣艾司摩爾.
Design Engineer - Linkou Degree: Master Work Experience: 10-15 years, 4-9 years Travel: 25% Workplace Types: On-Site Job Description: Introduction to the job Within ASML, the Satellite D&E team (based in TW) works closely with counterparts located in ASML Wilton office in CT, US, and is responsible for the products including YS Sensor, DUV and EUV modules. The team is also the representative of the Wilton D&E team in Asia to handle design changes, i
Regular earnings reach NT$40,000
No requirement for relevant working experience
No management responsibility
Logo of NVIDIA.
We are now hiring for a Senior Mixed-signal Design Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can
Verilog
Mixed-Signal
PLL
5 years of experience required
No management responsibility
Logo of NVIDIA.
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU & SOC acts as the brains of computers, robots, and self-driving cars that can understand the world. We are looking for
DC-DC power solution
Linux OS
TGC Europe
3 years of experience required
No management responsibility
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Mechanical Engineering, Product Design, a related field, or equivalent practical experience. 10 years of experience designing mechanical components (e.g., plastic or metal parts, mechanical assemblies, printed circuit boards, or flexes). Experience using computer-aided design tools (e.g., NX, Creo, or Solidworks). Preferred qualifications: 12 years of experience in consumer product design. Experience shipping
Regular earnings reach NT$40,000
Logo of CakeResume Headhunting Recruitment Service.
1.Creating verification plans of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios. 2.Create verification environments using SystemVerilog, SystemC or UVM. 3.Identify and write all types of coverage measures for stimulus and corner-cases. 4.Debug tests with design engineers to deliver functionally correct design blocks. 5. Close coverage measures to identify verification holes and to sh
SystemC
RTL
SOC
3M ~ 4M TWD / year
10 years of experience required
No management responsibility
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 5 years of experience with verification methodologies and languages such as UVM and SystemVerilog. Experience developing and maintaining verification testbenches, test cases, and test environments. Preferred qualifications: Experience with RTL, low power (UPF/CPF), gate level (GLS) and formal
Regular earnings reach NT$40,000
Logo of Foreign Professional Talent Recruitment in Taiwan.
Design of switch-mode power supply and battery management systems. BBU (battery backup unit) design. Planning and design at the product and system level. Communicate and coordinate with cross-functional teams. Product design presentation. Guide and train junior colleagues. Target Companies/Industries : Delta Electronics/ Lite-On Power/ Mean Well, etc., major players in the power supply industry.
1.5M ~ 2.5M TWD / year
10 years of experience required
Managing 1-5 staff

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