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Logo of SHL Medical 瑞健股份有限公司.
【Main Responsibilities】 As a verification/product engineer, you will participate in the product development project and responsible for the followings: • Develop engineering test plan in the early phase of product development to provide direction to adjusting the design • Support realizing design prototype • Reviewing the product designs and noting likely points of failure. • Reviewing existing engineering criteria for similar products. • Meeting with product designers and apply regulatory stand
40K+ TWD / month
1 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
1. SoC level and IP level verification methodology 2. Develop a verification plan and Integrated verification environment 3. Integrate VIP into the SOC verification platform.
UVM
Verification
PCIe
2M ~ 4M TWD / year
5 years of experience required
No management responsibility
Logo of NVIDIA.
NVIDIA is seeking outstanding entry-level Verification Engineers to verify the design and implementation of the next generation of PCI Express controllers for the world’s leading GPUs and SOCs by developing scalable testbench that is re-usable across different verification methodologies and environments. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing fiel
PCIE
ASIC
Verilog
2 years of experience required
No management responsibility
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. Experience with verification methodologies and languages such as UVM or SystemVerilog. Experience in verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems). Preferred qualifications: Master's degree or PhD in Electrical Engi
Regular earnings reach NT$40,000
Logo of CakeResume Headhunting Recruitment Service.
工作內容 Knowledge of System Verilog, digital simulation and debug. Exposure to UVM is desired. Familiar with USB design is a plus. DV Experience: 6~10 years 薪資架構 13個月計算, RSU 另計
Design Verification
DV
Systemverilog
4M ~ 5M TWD / year
6 years of experience required
Managing 1-5 staff
Logo of Morgan Philips Group.
【工作內容】 1. SoC level and IP level verification methodology 2. Develop a verification plan and Integrated verification environment 3. Integrate VIP into the SOC verification platform.
UVM
Verilog
Verification
Regular earnings reach NT$40,000
2 years of experience required
No management responsibility
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with physical design verification flows and methodology (e.g., DRC, LVS, PERC, ESD signoff, ERC, antenna, DFM) using industry standard signoff tools. Experience managing various physical verification check runsets. Preferred qualifications: Master's degree or PhD in Elec
Regular earnings reach NT$40,000
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 2 years of experience in functional verification, performance validation, developing test plans, and diagnostic codes of modern processors. Experience with processor microarchitecture. Preferred qualifications: Master’s degree in Electrical Engineering, Computer Science, or related field. Experi
Regular earnings reach NT$40,000
Logo of Google.
Google welcomes people with disabilities. Note: By applying to this position you will have an opportunity to share your preferred working location from the following: New Taipei, Banqiao District, New Taipei City, Taiwan; Taipei, Taiwan . Minimum qualifications: Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. Experience verifying digital logic at RTL using SystemVerilog for ASICs. Experience verifying digital systems using standard IP componen
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of experience in design verification. Experience with functional verification and performance validation of modern mobile processors, microarchitecture, and related technologies. Experience developing and maintaining verification testbenches, test cases, and test environments. Prefer
Regular earnings reach NT$40,000

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