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Logo of ASML Taiwan 台灣艾司摩爾.
Introduction to the job New product introduction from proto to pilot System level performance improvement project System level issue treatment Role and responsibilities Speed up new product introduction process System performance enhancement System performance sustaining New product introduction from proto to pilot E-beam System performance enhancement and sustaining. System level issue trouble shooting System project facilitator and management Experimental Design Education and experience PH.D.
Regular earnings reach NT$40,000
No requirement for relevant working experience
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
Maintain and integrate PCIe/ USB3.2/USB4/ related IP and peripheral design. Verify PCIe/ USB3.2/USB4 related IP.
UVM
Verilog
RTL
2M ~ 4M TWD / year
3 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
Lead the design of NAND flash IO circuits, ensuring optimal performance and reliability. Demonstrate proficiency in basic analog circuit design concepts, including LDO, DCDC, BANDGAP, Voltage Detector, PLL, ADC, etc. Collaborate in conducting fail sample analysis and contribute to IC measurements to identify and address potential issues. If you have experience in NAND flash IO circuit design, a strong foundation in analog circuit design, and skills in fail sample analysis and IC measurement, we
2M ~ 4M TWD / year
5 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
Lead the top-level integration of analog IPs, encompassing projects related to SSD, UFS, eMMC, SD, and more. Demonstrate a solid understanding of basic analog circuit design concepts, including but not limited to LDO, DCDC, BANDGAP, Voltage Detector, PLL, ADC, etc. Assist in conducting fail sample analysis and perform IC measurements to contribute to the identification and resolution of issues. If you have a background in analog IP integration, possess a strong grasp of analog circuit design
2M ~ 4M TWD / year
3 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
進行PCB的層層堆疊阻抗設計及SI/PI模擬分析。 撰寫版面設計指南並執行版面品質檢查。 審核並排除訊號量測問題
SIPI
signal&power integrity
Signal Integrity
1.2M ~ 2.8M TWD / year
2 years of experience required
No management responsibility
Logo of Foreign Professional Talent Recruitment in Taiwan.
Maintain and integrate PCIe/ USB3.2/USB4/ related IP and peripheral design. Verify PCIe/ USB3.2/USB4 related IP.
UVM
RTL
2M ~ 4M TWD / year
3 years of experience required
No management responsibility
Logo of 神基科技.
1. Design the power circuits and charger function(D/D, charger, inverter, adapter test, battery packing /gauge design) of rugged laptop and tablet products. 2. Evaluate the function, efficiency, performance, thermal, cost, and layout placement of power. 3. Review and analyze the power, and communicate and co-work with a cross-function team based on the result 1. 設計強固型筆記本電腦和平板產
Electronics Industry
65K ~ 80K TWD / month
2 years of experience required
No management responsibility
Logo of 神基科技.
1.產品EMC(電磁相容)設計、測試、驗證及報告。 2.PCB 線路、layout 設計與修改。 3.EMC 設計技術研究與分享。 4.申請EMC 國際認證及新版法規研讀。 5.具MIL-STD & 多國認證尤佳。
Electronics Industry
word
google drive
50K ~ 90K TWD / month
3 years of experience required
No management responsibility
Logo of Morgan Philips Group.
Job Responsibilities: Engage in RTL/Digital circuit design, synthesis, and simulation/verification. Conduct FPGA synthesis and verification processes. Manage chip integration, algorithm implementation, and interface design. Generate test patterns.
1M ~ 3M TWD / year
3 years of experience required
No management responsibility
Logo of Morgan Philips Group.
【工作內容】 Maintain並整合USB3.2/USB4/PCIE MAC相關IP與Peripheral Design 驗證USB3.2/USB4/PCIE相關IP
1M ~ 3M TWD / year
1 years of experience required
No management responsibility

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