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【實習】Verilog/VHDL/FPGA Design 實習生

* Studying and developing RTL code using VHDL or Verilog to accelerator kernels for Big Data platforms * System debug & Validation of FPGA prototype systems * Performance analysis and tuning of workloads on heterogeneous platform...

Updated 6 days agoHourly TWD 140 ~ 300

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