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Maintain and integrate PCIe/ USB3.2/USB4/ related IP and peripheral design. Verify PCIe/ USB3.2/USB4 related IP.

Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 5 years of experience analyzing workloads on real systems or devices. Experience in hardware performance monitors or profiling, and profiling or tracing tools in Android such as perfetto, trace or simpleperf. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer En

Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 3 years of experience in ASIC performance power management or low-power design and methodology. Experience in computer architecture concepts, such as micro-architecture, cache, pipe-lining, and memory subsystems. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Compute

Maintain and integrate PCIe/ USB3.2/USB4/ related IP and peripheral design. Verify PCIe/ USB3.2/USB4 related IP.

Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. Experience in embedded system software development, test, and debug. Experience with the Linux environment. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture. Experience with CPU, GPU,

We are now looking for a ASIC Verification Engineer - Coherent High Speed Interconnect! For two decades, we have pioneered visual computing, the art and science of computer graphics. With our invention of the GPU - the engine of modern visual computing - the field has grown to encompass video games, movie production, product design, medical diagnosis, and scientific research. Today, we stand at the beginning of the next era, the AI computing era, ignited by a new computing model, GPU

Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 3 years of experience in ASIC performance or power modeling, management, optimizations, and post-silicon characterization. Experience with SoC architecture and use case datapath with performance and power management concepts. Preferred qualifications: Master's degree or PhD in Electrical Enginee

Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 5 years of experience in SoC performance or power analysis, modeling, and optimizations. Experience with SoC architectures, performance, and power KPIs. Experience in software power optimizations (Android, Linux) and post-si power productization work. Preferred qualifications: Master's degree or

Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 3 years of experience with embedded system software development, test and debug, analyzing workloads on real systems or devices. Experience in hardware performance monitors or profiling, and profiling or tracing tools in Android such as perfetto, ftrace or simpleperf. Preferred qualifications: M

Tensorcom, a pioneer in developing innovative semiconductors for high-speed millimeter wave, ultra-low power, wireless communication chipsets, is looking for a candidate who is interested in working on complex, low power, ASIC designs for our next generation WiGig/IEEE 802.11ad compliant SoCs. The interested candidate will participate in a range of ASIC development activities such as defining the SoC architecture, the development of RTL code, the taping-out of the chip, and the evaluation of