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湯傑策
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湯傑策
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和碩集團_和碩聯合科技股份有限公司
中興大學電機工程所
Taichung City, Taiwan
Professional Background
Current status
Employed
・
Open to opportunities
Profession
Embedded Developer
・
Firmware Engineering
Fields
Consumer Electronics
Work experience
6-10 years (2-4 years relevant)
Management
I've had experience in managing 1-5 people
Skills
C
Verilog
Languages
Chinese
・
Native or Bilingual
English
・
Intermediate
Highest level of education
Master
Job search preferences
Desired job type
Full-time
・
Interested in working remotely
Desired positions
軟韌體工程師
Desired work locations
Freelance
Work Experience
FPGA Design Engineer
和碩集團_和碩聯合科技股份有限公司
・
Full-time
Jun 2023
-
Present
Taipei City, Taiwan
1.開發及驗證 Verilog code 2.整合使用 FPGA IP,具模擬驗證以達功能的需求 3.Xilinx FPGA Application development C-Coding 4.build the embedded Linux system (Petalinux) 5.系統驗證項目的規劃及系統整合與測試
Team Leader
Excetek
Jul 2015
-
Jun 2023
・
8 yrs 0 mos
1.CNC控制器開發經驗 2.建立放電加工機、放電微細孔加工機 3.MCU/Motor control
Education
中興大學電機工程所
Master’s Degree
・
電機
2018 - 2021
成功大學
Bachelor of Science (BS)
・
數學
2007 - 2012