Avatar of Chiu Kuan Chieh.
Chiu Kuan Chieh
Design Verification Engineer at RealTek
Profile
Posts
0Connections
Print
Avatar of the user.

Chiu Kuan Chieh

Design Verification Engineer at RealTek
No intro yet.
Realtek Semiconductor Corp.
National Taiwan University
新竹市, 台灣

Professional Background

  • Current status
    Employed
    Ready to interview
  • Profession
  • Fields
  • Work experience
    2-4 years relevant
  • Management
  • Highest level of education

Job search preferences

  • Desired job type
    Full-time
    Interested in working remotely
  • Desired positions
  • Desired work locations
  • Freelance

Work Experience

Design Verification Engineer

Mar 2021 - Present
Zhubei City, Hsinchu County, Taiwan
◆ Integrated Circuit Verification -- Verify Serdes interface DisplayPort 1.4/2.0 data link layer (MAC Layer) in monitor IC. -- Verify MIPI C-PHY/D-PHY/A-PHY in automotive IC. -- Verify mixed-signal of Analog Combo PHY model composed of DisplayPort and USB. ◆ Tool and Skills -- Testbench Building: Creating testbench in Verilog and SystemVerilog for each DUT to validate checkpoints. Also using Python to build reference model as golden to be compared. -- Script Automation: Using Perl script to auto-include related files and execute the compilation. -- Issue Identifying: Tracing root cause from unexpected error report via waveform(Verdi). -- Cron Regression: Automatically re-run all testcases when RTL updated. -- Architecture Visualization: Drawing block diagram with Visio to clearly explain test plans. -- Cross-departmental Discussion: Resolving RTL bugs and firmware pattern flow issues through effective communication.
Logo of the organization.

Teaching Assistant

Sep 2015 - Jun 2016
10 mos
Electricity (III) Engineering Mathematics: Complex Variable

Education

電子工程學系
2015 - 2021
Description
Skills: Verilog · TCL · Matlab · Linux · NC-Verilog · Verdi · Synopsys Design Compiler
電機工程學系
2011 - 2015
Description
Skills: Verilog · C++