【實習】Verilog FPGA Design 實習生

Job updated 2 months ago

Job Description

This internship shall last at least 4 months at full-time or 2-4 days per week part-time. Please make sure you will be able to complete this period before sending your application.

* Studying and developing RTL code using Verilog to accelerate kernels for Big Data platforms 

* System debug & Validation of FPGA prototype systems

* Performance analysis and tuning of workloads on heterogeneous platform

Requirements

1. 具備 Verilog/VHDL/FPGA 設計經驗
2. 對於 startup 有熱誠
3. Strong technical and problem solving skills.
4. Strong written and verbal communications skills.
5. Ability to define and execute tasks with limited direction.
加分條件:有 Hadoop 相關經驗

3
No requirement for relevant working experience
200 ~ 500 TWD / hour
Optional Remote Work
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About us

偉薩科技 WASAI Technology 專注在 Big data 軟硬體整合優化解決方案。核心技術為大數據資料處理加速引擎,包含優化資料處理程式 (Apache Hadoop™與Apache Spark™),以及大數據資料處理專用加速晶片平台 (FPGA),並進一步結合FPGA之硬體加速,與程式平台優化的軟硬整合技術。

偉薩科技核心創業團隊擁有13+年技術開發之經驗,分別來自 IBM、聯發科技等大型國際企業,擁有高度專業及豐富產業經驗。對於IC設計、分散式軟硬體協同運算以及伺服器產業有深厚的基礎與瞭解,擁有獨特技術之產品,成為少數擁有研發巨量資料軟硬體核心技術的大數據產業之一員。



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