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4-6 years
6-10 years
10-15 years
More than 15 years
Avatar of 陳柏豪.
Avatar of 陳柏豪.
Software QA Team lead @Gate.io
2023 ~ Present
Within one month
Taipei, Taiwan As the Team Lead and manage with a total of 4 people. 1. Team Formation and Leadership Initiated and led the formation of a new testing team. Provided guidance on planning from business logic documents and led efforts to ensure a comprehensive understanding of business processes. 2. Skill Development and Cross-Team Communication Mentored the team on testing techniques and fostered effective communication across different teams. Ensured a seamless integration process from development to testing to release, emphasizing the importance of minimizing frequent releases. 3. Process Integration Oversaw the entire
Development Process
Develop New Tools
Automatic Testing
Employed
Open to opportunities
Full-time / Interested in working remotely
4-6 years
國立清華大學 National Tsing Hua University
數學 mathematics,Probability,Applied Mathematic
Avatar of 林修弘.
半導體工程師
More than one year
國立中興大學 2006年 9 月年 6 月 技能 語言能力 中文:精通 英文:精通 溝通技巧 Coaching, motivating and mentoring Public presentation and speaking Easily establishes relationships with vendors 專業技能 Data analyst Process integration Automation systems Capacity Planning 新品開發專案成果 好事多OEM三層抽取式衛生紙 運用壓花加工技術增加厚實感 五月花雪絨柔感二層抽取
Word
PowerPoint
專案管理
Open to opportunities
Full-time / Not interested in working remotely
4-6 years
國立台灣大學
生物材料
Avatar of the user.
Avatar of the user.
Past
產品開發工程師/EPM @鴻來企業股份有限公司
2018 ~ 2023
半導體工程師/PM/產品經理/專案管理
Within six months
8D/RCCA troubleshooting
Assembly Processes
EPM
Unemployed
Full-time / Interested in working remotely
4-6 years
私立中國文化大學
機械工程學
Avatar of Chun-Yi Lee.
Avatar of Chun-Yi Lee.
Technical Integration and Customer Service Senior Engineer @Hannstar
2019 ~ Present
Semiconductor Engineer
Within two months
Chun-Yi Lee, Stanley Well abilities in trouble shooting, cross functional team collaborating, schedule controlling and resource managing; possess proactive, continued learning attitude . Strong expertise in new product introduction, schedule control and design issue fixing, quality or cycle time improvement project, and domestic or oversea customer service. Email : [email protected] Phone :Work Experience • JunP resent, Technical Integration and Customer Service Senior Enginee r • Hannstar display corporation Clarified issues, cross-sectoral cooperation, provided technical solutions and supported worldwide customers for technical service on product quality. Initiated process DOE for product quality issues for Truly & Amazon
SolidWorks
Cross Functional Communications
SEM
Employed
Full-time
6-10 years
國立中正大學(National Chung Cheng University)
mechanical
Avatar of shih-heng sun.
Avatar of shih-heng sun.
Past
Process Integration Engineer @TSMC Fab12B
2019 ~ 2021
Yield Improvement Engineer
More than one year
Shih Heng Sun Semiconductor Process Integration Engineer with 5+ years of experience. TSMC PIE specializing in advanced technology semiconductor products (3nm~10nm). Well-versed in yield improvement of semiconductor manufacturing process, Logic IC yield analysis, and collaborating with production line to solve problems. Making a huge leap for TSMC advanced IC fabrication in process integration and yield improvement. Enthusiastic about semiconductor product development and design which can change people's lives. Work Experiences Yield Improvement Engineer • TSMC Fab12B AugustDecember 2020 Expert in most advanced Logic IC process (5nm~10nm) and familiar with advanced measuring
Communicating
Measuring Instruments
Semiconductor Process
Unemployed
Full-time / Interested in working remotely
4-6 years
National Taiwan University
M.S. Photonics and Optoelectronics
Avatar of Hsieh Azure.
Avatar of Hsieh Azure.
Past
R&D process integration engineer @ UMC
2014 ~ 2022
Semiconductor Engineer
More than one year
process development Process integration engineer • Taiwan Semiconductor Manufacturing Company(TSMC) JulyApril 2014 Process integration engineer from 20nm to 40nm - 55/65nm - 90nm and other mature technologies 1. Mature technology node: Customer handling (including new tape-out, low yield analysis, WAT, SPC chart) 2. Advanced technology node: 20nm process transfer from Hsinchu to Tainan, and 2P2E-DUV pitch 64nm Cu-interconnect process development EducationNational Yang Ming Chiao Tung University Electrical Engineering & IC designChang Gung University,CGU Electrical Engineering Department Personal advantage Strong learning ability Good at teamwork High problem solving ability Skills Reliability improvement Defect reduction Process Integration
Excel
reliability
Process Integration
Unemployed
Not open to opportunities
Full-time / Interested in working remotely
10-15 years
National Yang Ming Chiao Tung University
Electrical Engineering & IC design
Avatar of the user.
Avatar of the user.
資深產品工程師 @Dialog Semiconductor 德商戴樂格半導體有限公司台灣分公司
2022 ~ Present
工程師
Within three months
半導體製程相關
半導體物理
半導體材料
Employed
Full-time / Interested in working remotely
6-10 years
國立交通大學 National Chiao Tung University
電子工程
Avatar of 林庭揚.
Avatar of 林庭揚.
Process Integration Engineer @Taiwan Semiconductor Manufacturing Company
2014 ~ Present
Product Engineer
Within one year
and in the company. I hope that I have opportunity to try my best for your company with my extensive experience. Process Integration Engineer, TSMC, Tainan, Taiwan [email protected] Semiconductor (5nm~90nm) Device engineering Semiconductor Process WAT Analysis Yield Analysis Process Quality Test Manufacturing Statistical Process Control (SPC) Cp/Cpk Failure Mode and Effects Analysis (FMEA) Design of Experiments (DOE) PDCA 3-Leg-5-Why 8D Pareto Chart Box Plot & Normal Quantile Plot Failure Analysis Tool JMP software Transmission Electron Microscopy (TEM) Energy-dispersive X-ray spectroscopy (EDX) Work Experience TSMC, Process Integration Engineer
Full-time / Interested in working remotely
4-6 years
Cheng Kung University
Electrical Engineering
Avatar of 黃鈺惠.
Avatar of 黃鈺惠.
工程師 @台灣神隆股份有限公司
2021 ~ Present
工程師
More than one year
評估製程專案計劃 6.協助佈展並參展FINETECH JAPAN(日本顯示器製造技術展) 7.總攬無接縫圓筒生產線與鎳電鑄製程生產線 Process Engineer Responsibilities: - Seamless NIL technology R&D - Electroforming process control and improvement - Roll to roll production technology - Photo-resist coating process control and improvement - Plate to roller process control and improvement - Process integration Awards and Key Contributions: - Team leader - Process yield rate increase 20% - Execute process project - Improve photoresist
word
powerpoint
excel
Employed
Full-time / Interested in working remotely
4-6 years
國立成功大學
機械工程系
Avatar of the user.
Avatar of the user.
Past
Senior RD engineer @VISHAY GENERAL SEMICONDUCTOR
2018 ~ 2020
semiconductor engineer
More than one year
Analysis
Process Improvement
Device Physics
Unemployed
Not open to opportunities
Full-time / Interested in working remotely
10-15 years
Nation Cheng Kung University
Electrical Engineering

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