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R&D process integration engineer @ UMC
2014 ~ 2022
Semiconductor Engineer
More than one year
Excel
reliability
Process Integration
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10-15 years
National Yang Ming Chiao Tung University
Electrical Engineering & IC design
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External Manufacturing Manager @ONsemiconductor
2018 ~ Present
Managing Director
More than one year
In process control (stability), process capability best practice cross fertilization management. • Promoting yield improvement and systematically feedback information to new product development team, PDCA cycle review. • Actively identify scrap saving opportunities. • Process optimization related to yield loss caused by strict customer requirements and quality case. • Be yield enhancement hub for technical assessment from IC circuit design, wafer manufacturing, assembly, test and OSAT capability evaluation. • Initiate taskforces to drive OSAT on multi-dimensional tasks including customer voice, quality focus, production sustaining. • Lead continuous improvement program to achieve excellent yield and quality performance. • Drive yield
word
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6-10 years
National Chiao Tung University, Hsinchu, Taiwan, Republic of China
Material Science and Engineering
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研發工程師 @新日興股份有限公司
2021 ~ 2023
機械工程師,半導體製程工程師,半導體設備工程師,
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Word
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6-10 years
國立台北科技大學
Materials Science and Engineering
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Test Equipment Technician @Micron Technology 台灣美光
2018 ~ Present
製程工程師、設備工程師、半導體工程師
Within one month
吳明赫 Test Equipment Technician Taichung City, Taiwan Passionate about continuous learning and professional growth, good at working effectively under pressure, with 10 years of experience in semiconductor back-end equipment. Demonstrates excellence in equipment maintenance, upkeep, improvements and capability enhancements. 工作經歷 Test Equipment Technician Micron Technology 台灣美光 • 十一月Present # Leadership Daily *improvement Equipment UPH/PPJ/MTBF/SDT/UDT KPI, until meet target *Mentor other equipment engineers in the respective area *Support edit/improve Equipment...OCAP/Procedure/SOP
Microsoft Office
critical thinking
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Employed
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10-15 years
南台科技大學
電機工程系
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Process Integration Engineer @TSMC Fab12B
2019 ~ 2021
Yield Improvement Engineer
More than one year
Shih Heng Sun Semiconductor Process Integration Engineer with 5+ years of experience. TSMC PIE specializing in advanced technology semiconductor products (3nm~10nm). Well-versed in yield improvement of semiconductor manufacturing process, Logic IC yield analysis, and collaborating with production line to solve problems. Making a huge leap for TSMC advanced IC fabrication in process integration and yield improvement. Enthusiastic about semiconductor product development and design which can change people's lives. Work Experiences Yield Improvement Engineer • TSMC Fab12B AugustDecember 2020 Expert in most advanced Logic IC process (5nm~10nm) and familiar with advanced measuring
Communicating
Measuring Instruments
Semiconductor Process
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4-6 years
National Taiwan University
M.S. Photonics and Optoelectronics
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Project Enginner @ASE Technology Holding Co., Ltd.
2019 ~ Present
QA Engineer
More than one year
Word
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6-10 years
國立嘉義大學
應用數學, 統計

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More than one year
Yield Improvement Engineer
TSMC Fab12B
2019 ~ 2021
Professional Background
Current status
Unemployed
Job Search Progress
Professions
Electrical Engineer, Product Engineer
Fields of Employment
Consumer Electronics
Work experience
4-6 years
Management
None
Skills
Communicating
Measuring Instruments
Semiconductor Process
Property Analysis
Field Inspection
Data Analysis
Word
PowerPoint
Excel
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English
Fluent
Chinese
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Yield Improvement Engineer
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Full-time
Locations
Taipei, 台灣, Zhubei, Zhubei City, Hsinchu County, Taiwan
Remote
Interested in working remotely
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No
Educations
School
National Taiwan University
Major
M.S. Photonics and Optoelectronics
Print

Shih Heng Sun

Semiconductor Process Integration Engineer with 5+ years of experience.

TSMC PIE specializing in advanced technology semiconductor products (3nm~10nm). Well-versed in yield improvement of semiconductor manufacturing process, Logic IC yield analysis, and collaborating with production line to solve problems. Making a huge leap for TSMC advanced IC fabrication in process integration and yield improvement. Enthusiastic about semiconductor product development and design which can change people's lives.

    

Work Experiences

Yield Improvement Engineer  •  TSMC Fab12B

August 2016 - December 2020

Expert in most advanced Logic IC process (5nm~10nm) and familiar with advanced measuring instruments such as SEM, E-beam and Bright/Dark Field Inspection Tool.
Specialized in detecting defects to improve yield.
Collaborated with EE & PE to refine logic IC manufacturing procedure and lower production cost.

Process Integration Engineer  •  TSMC Fab12B / TSMC R&D

May 2019 - December 2019 / January 2021 - December 2021 

Proficient in analyzing the relationship between chip electrical properties and process problems.
Specialized in using electrical data analysis (3nm~5nm) to improve Logic IC performance
Experienced in hitherto the most advanced semiconductor process (3nm).

Education

2013/09 - 2016/07

National Taiwan University

M.S. Photonics and Optoelectronics

2006/09 - 2010/06

National Taiwan University

B.S. Physics

Graduate Research

Enhancement of Emission Efficiency of Deep-ultraviolet AlGaN Quantum Wells through Surface Plasmon Coupling with an Al Protrusion Array

Skills


  • Semiconductor electrical property analysis
  • Advanced metrology tools (SEM, DB/DD and E-beam)
  • Excellent in problem-solving
  • Capable of both working on teams and individual
  • Influential communicating and reporting skills

Languages


  • English — Fluent
  • Chinese — Native
Resume
Profile

Shih Heng Sun

Semiconductor Process Integration Engineer with 5+ years of experience.

TSMC PIE specializing in advanced technology semiconductor products (3nm~10nm). Well-versed in yield improvement of semiconductor manufacturing process, Logic IC yield analysis, and collaborating with production line to solve problems. Making a huge leap for TSMC advanced IC fabrication in process integration and yield improvement. Enthusiastic about semiconductor product development and design which can change people's lives.

    

Work Experiences

Yield Improvement Engineer  •  TSMC Fab12B

August 2016 - December 2020

Expert in most advanced Logic IC process (5nm~10nm) and familiar with advanced measuring instruments such as SEM, E-beam and Bright/Dark Field Inspection Tool.
Specialized in detecting defects to improve yield.
Collaborated with EE & PE to refine logic IC manufacturing procedure and lower production cost.

Process Integration Engineer  •  TSMC Fab12B / TSMC R&D

May 2019 - December 2019 / January 2021 - December 2021 

Proficient in analyzing the relationship between chip electrical properties and process problems.
Specialized in using electrical data analysis (3nm~5nm) to improve Logic IC performance
Experienced in hitherto the most advanced semiconductor process (3nm).

Education

2013/09 - 2016/07

National Taiwan University

M.S. Photonics and Optoelectronics

2006/09 - 2010/06

National Taiwan University

B.S. Physics

Graduate Research

Enhancement of Emission Efficiency of Deep-ultraviolet AlGaN Quantum Wells through Surface Plasmon Coupling with an Al Protrusion Array

Skills


  • Semiconductor electrical property analysis
  • Advanced metrology tools (SEM, DB/DD and E-beam)
  • Excellent in problem-solving
  • Capable of both working on teams and individual
  • Influential communicating and reporting skills

Languages


  • English — Fluent
  • Chinese — Native