gmail.comHsinchu, Taiwan Engineering Skills PHYSICAL DESIGN Establish and deploy physical design methodology in advanced nodes (7/6/5/4/3nm) Design implementation from netlist to tape-out and PPA assessment in 7/6/5/4/3nm technologies Proven knowledge of Cadence Innovus and Synopsys ICC2/FusionCompiler backend design flow Familiar with Ansys Redhawk/Redhawk-CPA EM/IR methodology CUSTOMER ENGAGEMENT, SUPPORT, and EDUCATION Coordinate technical support to customers in the above areas of profession Proactive and close collaboration with EDA vendors Conduct technological training courses and technical
Physical Design
ASIC
System On A Chip
Employed
・
Not open to opportunities
Full-time / Interested in working remotely
6-10 years
National Chiao Tung University
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Electronics Engineering
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