shih-heng sun
Yield Improvement Engineer
TSMC PIE specializing in
advanced tech. semiconductor process (3nm~10nm). Well-versed in yield improvement of semiconductor manufacturing process, Logic IC yield
analysis, and collaborate with production line to solve problems . Made a huge leap for
TSMC advanced IC chip defect detection and yield improvement. Enthusiastic about
semiconductor product development and design which can change people's lives.
Skills
Languages
English
・
Fluent
Chinese
・
Native or Bilingual
Work experiences
Process Integration Engineer
TSMC Fab12B
May 2019 ~ Dec 2021
・
2 yrs 8 mosHsinchu, Hsinchu City, Taiwan
Proficient in analyzing the relationship between chip electrical properties and process problems.
Specialized in using electrical data analysis 3 nm - 5 nm to improve Logic IC performance
Experienced in hitherto the most advanced semiconductor process 3 nm .
Yield Improvement Engineer
TSMC Fab12B
Aug 2016 ~ Dec 2020
・
4 yrs 5 mosHsinchu, Hsinchu City, Taiwan
Expert in most advanced Logic IC process 5 nm - 10 nm and Familiar with advanced measuring instruments SEM, E-beam and Bright/Dark Field Inspection Tool
Specialized in detecting defects to improve yield
Collaborated with EE & PE to refine Logic IC manufacturing procedure and lower production cost.
Educations
National Taiwan University
Master’s Degree・M.S. Photonics and Optoelectronics
2013 - 2016
National Taiwan University
Bachelor’s Degree・B.S. Physics
2006 - 2010
