TienYaoHsu
Senior FAE
I am confident that the combination of solid engineering background, a variety of practical work experience, and good RTL coding skills has prepared me for being an excellent FPGA engineer.
I am responsible for server and switch supporting and help customers survey suitable FPGA for their circuit design.
WEIKENG INDUSTRIAL CO., LTD
National Kaohsiung First University of Science and Technology
台灣新竹市新竹
Skills
Work experiences
Senior FAE
WEIKENG INDUSTRIAL CO., LTD
Feb 2016 ~ Present
1. Verilog coding/modification for the customer.
2. Function simulation.
3. FPGA engineering support.
4. FPGA board level debug.
5. Familiar with I2C master/slave, UART, PWM, and TACH.
6. Good knowledge of server and switch architecture.
7. The power sequence coding for Intel or AMD CPU/SOC.
Senior Engineer
AUO
Oct 2013 ~ Nov 2015
・
2 yrs 2 mos1. Optimization improves the performance of display optical.
2. The peripheral circuit design of the display panel module.
3. Verilog coding.
4. Keil C coding.
Hardware Engineer
CASwell, Inc.
Oct 2012 ~ Sep 2013
・
1 yr 0 mos1. Designing PCB circuit of the Intel x86 platform.
2. To debug the circuit with an oscilloscope.
ZyXEL
Maintenance Assistant Engineer
Apr 2007 ~ Aug 2010
・
3 yrs 5 mos1. FTTx and DSLAN debugging, troubleshooting and testing.
2. Process and provide RMA services.
Educations
National Kaohsiung First University of Science and Technology
Master’s Degree・Computer and Communication Engineering
2010 - 2012
National Chin-Yi University of Technology
Bachelor’s Degree・Electrical Engineering
2003 - 2005
National Chin-Yi University of Technology
Associate’s Degree・Electrical Engineering
2001 - 2003
