Yun-Hsuan Chung
https://github.com/luk1684tw
[email protected]
Education & Work Experience
BTMCU System Design Engineer, OCT.2021 - Present
Embedded System design for BLE/2.4G proprietary applications.
Peripheral driver implementation
MS in Computer Science, NCTU, JUL.2019 - SEP.2021
National Chiao-Tung University (Personal Communication System Lab, Yi-Bing Lin)
GPA: 3.66/4.6
BS in Computer Science, NTHU, SEP.2015 - JUL.2019
National Tsing-Hua University (Network Application Specific Integrated Circuit Lab, Ching-Te Chiu)
GPA: 3.57/4.3
Skills
Programming Language: C/C++, Python, Verilog
Language: TOEIC 835、 GEPT High Intermediate(Preliminary)
Familiar with OS: Linux, WIndows
Courses (Master level course *)
Software
Compiler
/
Introduction to IoT
/
Cryptography and Network Security
/
Introduction to Computer Networks
/
Advanced Data Structure*
/
Cloud Programming*
/
Data Science*
/
Deep Learning
* /
RTOS
*
Hardware
Hardware Design and Lab
/
Digital Logic Design
/
Digital System Design
/
Introduction of Integrated Circuit Design / VLSI System Design
*
Research & Projects
K-Nearest Neighbor Algorithm Hardware Accelerator (Verilog)
KNN hardware Accelerator in Verilog with open-source RISC-V CPU.
RTL Simulation / Synthesis / Testbench / VLSI flow
BLE SoC Product Implementation (C Language)
Peripheral driver implementation.
Stack service implementation
2.4G Proprietary Product Implementation (C Langnage)
RF driver customization for p
roprietary protocol
Onsite support abroad
RTOS Scheduler Implementation (C/C++)
Scheduler algorithm RM, EDF, CPP
Kernel programming
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