Bruce Hsieh

Package Design & Substrate Planning Manager

  Hsinchu, Hsinchu City, Taiwan

v Master of material science technology

v 10 years experience in assembly industry, including
- 3 years wire bonding process experience for logic product with lead frame base
- 6.5 years package design experience for memory product with wire bonding and flip chip base. Package type include BGA base product (MCP / PoP )
- 0.5 year substrate planning experience

v Key achievement
- Focal team leader to achieve major customer annual audit successfully
- Manage new product development from design till mass production withhigh hitting rate
- Leading team to accomplish customer annual project with cross function team


* E-mail : [email protected]

* Phone no. : 0972-393331


 

Working Experience

Jun. 2021 - Present

Substrate material planning manager  Powertech Technology Inc.

1. Leading a 6 member team for substrate planning


2. Work with procurement to define long term substrate allocation and strategy


3. Inventory and excess material control. Work with process team to come out a plan to consume excess material


4. Be coordinator to work with a cross-function team to come out disposition for substrate incoming issue

5.Monitor substrate delivery and negotiate with suppliers


Apr. 2019 - Jun. 2021

R&D manager  Powertech Technology Inc.

1. Leading 6 members for new production development
1-1 work with customers who has memory foundry to find out the best design solution for new product. (product type including MCP with wire bond and flip chip base)
1-2 find out the best direct material solution through technical discussion and simulation

1-3 work with project managed team to come out product development milestone


2. Build up design data base to consolidate the capability of team members


3. Be a coordinator and communication with cross function team project, e.g. standardization substrate design

4. To communicate and align a working model for better communication with customer manager

5.Integrate suppliers's technical road map with assembly process road map

Jun. 2016 - Apr. 2019

R&D section manager  Powertech Technology Inc.

1. Leading 6 members for new production development
1-1 work with customers who has memory foundry to find out the best design solution for new product. (product type including MCP with wire bond and flip chip base)
1-2 find out the best direct material solution through technical discussion and simulation

1-3 work with project manag team to come our product development milestone


2. Build up design data base to consolidate the capability of team members


3. Be a coordinator and communication with cross function team project, e.g. standardization substrate design

4. Communicate with suppliers for new direct material development. 

Jun. 2014 - Jun. 2016

R&D senior engineer  Powertech Technology Inc.

1. Project management :
1-1 Memory new product development from design till mass production. MCP (NAND+DRAM+controller) and PoP (DRAM) are major package type.
1-2 Cost reduction project

1-3 Work with process engineering team to come out DOE matrix for new structure or new material development


2. Trouble shooting, defining, integrating design rules and upgrading regularly


3. New direct material development (wire /compound / solder ball / die attach film)

Sep. 2010 - Jun. 2014

Wire bond process engineer  SPIL

1. Wire bonding process engineer for QFN package, the main job function are,
1-1 New product process condition and loop setting
1-2 New Cu wire and capillary development
1-3  Trouble shooting while new product development

1-4 Mass production trouble shooting and throughput enhancement


2. Focal team leader for new device qualification


3. Work with technical center to build up parameter data base and selection rule


Education

2007 - 2009

National Taiwan University of Science and Technology

Master of Material Science and Technology

2003 - 2007

National United University 

Bachelor of Material Science and Technology

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