1. Responsible for schematics design and using layout tools to review the routing/topology. (e.g. OrCAD, Allegro, PADS, Altium).
2. Involving PCB layout refinement and being open to knowing the PI/SI knowledge for improving the design quality.
3. Hardware Debugging and issue analysis.
4. Product validation and efficiency optimization.
5. To study/check specifications and find solutions including selecting/validating parts.
6. To review, record, document and maintain the design history and BOMs.
7. 產品或治具的電路分析、設計、驗證、檢討，零件選擇，線路布局檢查。
8. 零件選用，BOM 建立及維護。
9. 文件的編寫及維護。
10. 其他案件及交辦任務的執行與支援。

工作經歷

3年以上

學歷要求

大學以上

科系要求

電機電子工程相關

工作技能

硬體系統研發設計、電路板佈局規劃、電子電路設計

其他說明

Basic knowledge of EE lab equipment including oscilloscopes, multimeters, power supplies, etc. Strong system-level product debugging skills. Work independently and continue to be advanced. Attention to detail and good communication and logic skills. Knowledge of product development calendar, process, timelines, and deliverables. Depending on capability and performance, the annual salary can go beyond 1,700,000. Attaching the experience of products with your CV will be better (or introducing while interviewing).Please make sure to follow your company's intellectual property.

• Send your resume with trackable record
• Cytesi will review your resume and invite you for further inteview if you are the possibile candidate that we look for within 2 weeks. 
• The interview might be 1 or 2 times depends on needs.