• 學歷要求:碩士
• 科系要求:資訊工程相關,電機電子工程
• 擅長工具

Perl/ASIC/EDA/FPGA/RTL/Synopsys/Verilog

• 工作技能:硬體系統研發設計/數位晶片產品開發/數位電路驗證證

• 其他條件Minimum qualifications:
  1. Master's degree in Computer Engineering, Computer Science, Electrical Engineering or equivalent practical experience.
  2. Experience working with Verilog or SystemVerilog.
  3. Ability to travel if necessary.
  
  Preferred qualifications:
  1. Excellent analytical skills and creative problem-solving.
  2. Excellent communication skills.
  3. Ability to quickly learn, understand and work with new products, technologies and solutions.
  4. Experience promoting CPU IPs.
  5. Experience in CPU design or verification with Verilog.
  6. Experience in SoC design integration or verification with Verilog.
  7. Experience with ASIC/FPGA logic synthesis/implementation design flows.
  8. Experience with scripting languages, Perl or Python.
  9. Ability to travel to customer sites, conferences and other related events as needed.