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Taipei City, Taiwan
Other
1. SoC level and IP level verification methodology 2. Develop a verification plan and Integrated verification environment 3. Integrate VIP into the SOC verification platform.
Maintain and integrate PCIe/ USB3.2/USB4/ related IP and peripheral design. Verify PCIe/ USB3.2/USB4 related IP.
進行PCB的層層堆疊阻抗設計及SI/PI模擬分析。 撰寫版面設計指南並執行版面品質檢查。 審核並排除訊號量測問題
1.2M ~ 2.8M TWD / year
2 years of experience required
No management responsibility
About Creaviwork Creaviwork is a Technology Application Lab with the mission to bridge the gap between the application of chemistry science traditionally confined within the walls of a lab and the outside world of everyday use. Established in 2016 by a growing team of passionate scientists and creatives, Creaviwork practices innovative technical solutions across multiple areas of disciplines including design, marketing services, and business development. Your specific role will include, but not
