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Tainan City, Taiwan
Logo of ASML Taiwan 台灣艾司摩爾.
Job Title [Taiwan Pipeline] D&E-Firmware Design Engineer (FPGA)-Tainan Degree: Master Work Experience: 2-3 years, 4-9 years Travel: 25% Remote Work: Partially Job Description: Introduction to the job Be a FPGA firmware design engineer and join the world’s most advanced electron beam defect inspection equipment development. Responsible for e-Beam inspection sustaining system improvement project, customer special request, and issue investigation. Firmware design support for new system and tool dev
Regular earnings reach NT$40,000
No requirement for relevant working experience
No management responsibility

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