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Maintain and integrate PCIe/ USB3.2/USB4/ related IP and peripheral design. Verify PCIe/ USB3.2/USB4 related IP.

Lead the design of NAND flash IO circuits, ensuring optimal performance and reliability. Demonstrate proficiency in basic analog circuit design concepts, including LDO, DCDC, BANDGAP, Voltage Detector, PLL, ADC, etc. Collaborate in conducting fail sample analysis and contribute to IC measurements to identify and address potential issues. If you have experience in NAND flash IO circuit design, a strong foundation in analog circuit design, and skills in fail sample analysis and IC measurement, we

Introduction to the job Are you a team player who wants to monitoring the software engineering processes and methods used to ensure software quality? Now, we are looking for software quality engineer to join us. This could be your next job, so if you would like to join us - please apply! Role and responsibilities “SBI or MBI” sustaining system and “D2D and D2DB DetectionCode” sustaining in TW. Response for Sustaining System / DetectionCode SW Quality testing / releasing

Job Title SS&P - Cost Engineer for Asia Degree: Bachelor, Master Work Experience: 4-9 years Travel: 25% Workplace Types: Hybrid Job Description: To take cost engineer functions for SS&P Asia, including SEA, Taiwan, China, South Korea and Japan 1. Cost analysis and validation to help commercial negotiation 2. Cost workshop, to identify opportunities and drive down cost 3. Cost education, to train our employees (not just sourcing leads) to increase cost knowledge 4. DST

Job Title [Taiwan Pipeline] D&E - System Software Product Owner/Technical manager/Sr. developer - Tainan Degree: Master, PhD Work Experience: 10-15 years, 16+ years, 4-9 years Travel: 10% Remote Work: Partially Job Description: Introduction to the job 〈This vacancy is open for talent pool collection. We will contact you if we have proper vacancies which are fit in your profile.〉 Are you ready to be a great pioneer to be part of

Maintain and integrate PCIe/ USB3.2/USB4/ related IP and peripheral design. Verify PCIe/ USB3.2/USB4 related IP.

Lead the top-level integration of analog IPs, encompassing projects related to SSD, UFS, eMMC, SD, and more. Demonstrate a solid understanding of basic analog circuit design concepts, including but not limited to LDO, DCDC, BANDGAP, Voltage Detector, PLL, ADC, etc. Assist in conducting fail sample analysis and perform IC measurements to contribute to the identification and resolution of issues. If you have a background in analog IP integration, possess a strong grasp of analog circuit design

進行PCB的層層堆疊阻抗設計及SI/PI模擬分析。 撰寫版面設計指南並執行版面品質檢查。 審核並排除訊號量測問題

1.產品EMC(電磁相容)設計、測試、驗證及報告。 2.PCB 線路、layout 設計與修改。 3.EMC 設計技術研究與分享。 4.申請EMC 國際認證及新版法規研讀。 5.具MIL-STD & 多國認證尤佳。

Job Title D&E - DUV Reticle Handler Electrical Design Engineer - Linkou Degree: Master Work Experience: 10-15 years, 4-9 years Travel: 25% Workplace Types: On-Site Job Description: Introduction to the job Within ASML, the Satellite D&E team (based in TW) works closely with counterparts located in ASML Wilton office in CT, US, and is responsible for the products including YS Sensor, DUV and EUV modules. The team is also the representative of the Wilton D&E