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Taiwan
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Hauman Technology
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onsemi
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台北醫學大學
國立台灣科技大學
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由田新技
筑波醫電
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Avatar of the user.
Avatar of the user.
Available for paid companies
SR. Vision System Engineer @開必拓數據
・
2019 ~ Present
資深視覺工程師 / 專案經理
Within one month
C#.NET development
c++ programming
python programming
Employed
・
Ready to interview
Full-time / Interested in working remotely
6-10 years
國立聯合大學 National United University
・
電子工程
Avatar of 謝欣宏.
Avatar of 謝欣宏.
謝欣宏
高級工程師 @電商
・
2023 ~ Present
軟體工程師、影像處理工程師、AI處理工程師、演算法工程師
Within one month
日期 四月 1994 · 永久有效 技能 深度學習：Python, PyTorch, TensorFlow, Keras and Pandas 虛擬技術：Virtual Box, VM Ware, Linux KVM, Docker, Kubernetes, Jenkins 程式語言：Java-Spring Boot, C & C++, PHP-Laravel, Clipper, FoxPro 前端語言：JavaScript, JQuery, AJAX, Vuejs 資 料 庫：MongoDB, Oracle, MySQL, Maria DB, PostgreSQL, DBASE, ACCESS, Timescale 作業系統：Windows, Ubuntu, CentOS, Novell, DOS, OS2 版本控制：GitLab, GitHub, SVN 電路設計：Protel, Altium Designer 電路設計：Protel, Altium Designer
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・
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Avatar of 黃上溢.
Avatar of 黃上溢.
黃上溢
系統工程師 @筑波醫電
・
2016 ~ Present
資深軟體工程師
Within one month
技術以適應日新月異的環境，並樂於分享使自己和團隊更進步更有效率。 工作技能 Tech Stack C# C++ C dot-net UWP WinForm HTML5 BootStrap JavaScript PowerShell Design Tools Gitea SourceTree Visual Studio Notion Trello Teams Jenkins Visual Studio Code Raspberry Pi ProgreSQL SQL Server 作品集 https://www.cakeresume.com/me/oldyellow125/portfolios 工作經驗 2016/07 - Now 系統工程師(兼任
C#
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Winform
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10-15 years
交通大學
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生醫工程暨資訊工程研究所

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Technical Skills
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Problem-Solving
Ability to identify, analyze, and prepare solutions to problems.
Adaptability
Ability to navigate unexpected situations; and keep up with shifting priorities, projects, clients, and technology.
Communication
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More than one year
Avatar of Hsinchieh Huang.
Hsinchieh Huang
Principal Design Engineer
台達電子
・
2018 ~ Present
Taipei City, Taiwan
Professional Background
Current status
Job Search Progress
Professions
Electronics Engineer
Fields of Employment
Manufacturing
Work experience
10-15 years
Management
None
Skills
Evaluation
Guide
Design Engineering
Electronics
Schematic
Technology Transfer
Schematic Design
Specification
Development
Create BOM
Communication
Responsible
Assisted
Languages
English
・
Intermediate
Chinese
・
Professional
Job search preferences
Positions
Principal Design Engineer
Job types
Locations
Remote
Interested in working remotely
Freelance
Yes, I'm currently a full-time freelancer
Educations
School
National Kaohsiung University of Applied Sciences
Major
Electronic
Print

Hsinchieh Huang

"遇到問題不抱怨,找方式解決，吸取經驗 "
從事硬體設計產業14年經驗中,專注硬體單板線路設計 線路優化
及系統評估和設計 從一開始只專注硬體設計部分,到與每個部門
和外部單位討論 溝通協調.使產品能夠順利減少bug，讓產品on
schedule .同時抱持開放式的態度與同事分享經驗 討論問題.降低 且減少產品的bug產生.
產品範疇涵蓋IPC、伺服器及伺服器Switch.

  Taipei City, Taiwan   

工作經歷

Principal Design Engineer  •  台達電子

四月 2018 - Present

內湖
Specification Evaluation Main board extension board and system,
Develop Schematic PCB layer placement and BOM cost.
Schematic design ex. Main board extension board.etc. .
Check placement layout layout guide and Create BOM.
Debug Main board extension board and system.etc.
Measure power on/off sequence high speed.etc.
Debug SW code CPLD code.
Frequent travel to Bangkok for system debug and Technology transfer.
Co-work with SI Sales PM ME SW CPLD ETE thermal.
Assist other hardware engineers to debug the board.

Senior Design Engineer  •  Ennoconn Corp

六月 2016 - 四月 2018

台灣 New T'aipei City 中和區
Specification Evaluation Sever M/B and Industrial M/B, Develop PCB layer and placement.
Schematic design ex. M/B A/D board .
Check placement layout Create BOM.
Debug M/B A/D board.
Measure power on/off sequence power report ripple jitter.etc. .

Senior Design Engineer  •  DQA

七月 2012 - 六月 2016

台灣 New T'aipei City 新店
Specification Evaluation M/B power board extension board and Sever
system, Develop PCB layer and placement.
Schematic design ex. M/B Power board HDD BPB RAID card Bridge
board. etc.
Check placement layout Create BOM.
Debug M/B System JBOD open rank Micro sever OCP.etc. .
Measure power on/off sequence power report ripple jitter.etc. .
Frequent travel to Ningbo for system debug and co-work with customer.
Co-work with PM ME Simulation BMC BIOS DQA SIT thermal.

Design Engineer  •  AAEON

七月 2007 - 六月 2012

台灣 New T'aipei City 新店
Specification Evaluation and Development M/B
Schematic Design ex. M/B LAN card VGA card riser card. etc.
Check placement layout Create BOM
Debug M/B
Measure power on/off sequence LAN signal SATA signal USB signal

學歷

2004 - 2006

National Kaohsiung University of Applied Sciences

Electronic

技能

語言

  • Evaluation
  • Guide
  • Design Engineering
  • Electronics
  • Schematic
  • Technology Transfer
  • Schematic Design
  • Specification
  • Development
  • Create BOM
  • Communication
  • Responsible
  • Assisted
  • English — 中階
  • Chinese — 專業
Resume
Profile
Print

Hsinchieh Huang

"遇到問題不抱怨,找方式解決，吸取經驗 "
從事硬體設計產業14年經驗中,專注硬體單板線路設計 線路優化
及系統評估和設計 從一開始只專注硬體設計部分,到與每個部門
和外部單位討論 溝通協調.使產品能夠順利減少bug，讓產品on
schedule .同時抱持開放式的態度與同事分享經驗 討論問題.降低 且減少產品的bug產生.
產品範疇涵蓋IPC、伺服器及伺服器Switch.

  Taipei City, Taiwan   

工作經歷

Principal Design Engineer  •  台達電子

四月 2018 - Present

內湖
Specification Evaluation Main board extension board and system,
Develop Schematic PCB layer placement and BOM cost.
Schematic design ex. Main board extension board.etc. .
Check placement layout layout guide and Create BOM.
Debug Main board extension board and system.etc.
Measure power on/off sequence high speed.etc.
Debug SW code CPLD code.
Frequent travel to Bangkok for system debug and Technology transfer.
Co-work with SI Sales PM ME SW CPLD ETE thermal.
Assist other hardware engineers to debug the board.

Senior Design Engineer  •  Ennoconn Corp

六月 2016 - 四月 2018

台灣 New T'aipei City 中和區
Specification Evaluation Sever M/B and Industrial M/B, Develop PCB layer and placement.
Schematic design ex. M/B A/D board .
Check placement layout Create BOM.
Debug M/B A/D board.
Measure power on/off sequence power report ripple jitter.etc. .

Senior Design Engineer  •  DQA

七月 2012 - 六月 2016

台灣 New T'aipei City 新店
Specification Evaluation M/B power board extension board and Sever
system, Develop PCB layer and placement.
Schematic design ex. M/B Power board HDD BPB RAID card Bridge
board. etc.
Check placement layout Create BOM.
Debug M/B System JBOD open rank Micro sever OCP.etc. .
Measure power on/off sequence power report ripple jitter.etc. .
Frequent travel to Ningbo for system debug and co-work with customer.
Co-work with PM ME Simulation BMC BIOS DQA SIT thermal.

Design Engineer  •  AAEON

七月 2007 - 六月 2012

台灣 New T'aipei City 新店
Specification Evaluation and Development M/B
Schematic Design ex. M/B LAN card VGA card riser card. etc.
Check placement layout Create BOM
Debug M/B
Measure power on/off sequence LAN signal SATA signal USB signal

學歷

2004 - 2006

National Kaohsiung University of Applied Sciences

Electronic

技能

語言

  • Evaluation
  • Guide
  • Design Engineering
  • Electronics
  • Schematic
  • Technology Transfer
  • Schematic Design
  • Specification
  • Development
  • Create BOM
  • Communication
  • Responsible
  • Assisted
  • English — 中階
  • Chinese — 專業