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The employer was active 2 days ago
Job Responsibilities: Engage in RTL/Digital circuit design, synthesis, and simulation/verification. Conduct FPGA synthesis and verification processes. Manage chip integration, algorithm implementat...
Job Responsibilities: Engage in RTL/Digital circuit design, synthesis, and simulation/verification. Conduct FPGA synthesis and verification processes. Manage chip integration, algorithm implementat...
300台灣新竹市
1M ~ 3M TWD / year
3 years of experience required
No management responsibility
【工作內容】 Maintain並整合USB3.2/USB4/PCIE MAC相關IP與Peripheral Design 驗證USB3.2/USB4/PCIE相關IP
【工作內容】 Maintain並整合USB3.2/USB4/PCIE MAC相關IP與Peripheral Design 驗證USB3.2/USB4/PCIE相關IP
台灣台北市
1M ~ 3M TWD / year
1 years of experience required
No management responsibility