Job Responsibilities:

1. Engage in RTL/Digital circuit design, synthesis, and simulation/verification.
2. Conduct FPGA synthesis and verification processes.
3. Manage chip integration, algorithm implementation, and interface design.
4. Generate test patterns.

Qualifications:

1. More than 3 years of related work experience
2. Proficiency in ASIC Flow/EDA Tools, including Synthesis DCG, Scan at-speed insertion, LEC, CLP, PrimeTime STA, PTPX, and Low-power flow implementation. Experience in CAD Team is advantageous.
3. Familiarity with ASIC/FPGA Integration, encompassing ARM CPU architecture, AXI/AHB/VCI Bus arbiter, Clock tree scheme, ASIC/SOC Power optimization flow, and Xilinx FPGA V7 Scale.
4. Knowledge of high-speed NAND flash specifications and control, or experience in eMMC/UFS IP design, is a plus.