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Logo of CakeResume Headhunting Recruitment Service.
專長是Class D Amp IP設計類比IC設計人員協助產品研發, 且相關設計/產品經驗有 10 年以上 。 工作內容: 1. 負責HV Class D Amp新產品的評估, 包含前期的面積評估, 製程比較, 2. 以及中期的Class D Amp IP
Analog Design
Analog IC
Class-D
3M ~ 5M TWD / year
6 years of experience required
No management responsibility
Logo of Accurate愛客獵-1111高階獵才中心.
產業類別: 生化科技研發 職責要求 • 熟悉類比訊號分析及電路設計能力。 • 相關開發經驗在小信號低雜訊類比電子電路的設計、模擬、Circuit Layout、電路量測及驗證。 • 熟悉OPAMP, Filter, ADC/DAC,… 規格, 性能特性及應用。 • 有能
類比IC設計
IC Layout
電子工程
1.1M ~ 1.3M TWD / year
8 years of experience required
No management responsibility
Logo of 凌耀科技股份有限公司.
1. Sensor IC/ Mixed Signal IC Design, Verification, Design/Verification related documents writing: -Familiar with Hspice, Matlab simulation tools. -Familiar with ADC/DAC, Bandgap, Regulator, Filter, and so on related IP design is preferred. -Interesting in Ambient light sensor, Proximity sensor, Long wave length Infrared sensor, Humidity sensor design is preferred. -Familiar with basic semiconductor process is preferred. 2. Support Mass Production Testing 3. Design Document/Report Support
26.4K ~ 26.4K TWD / month
5 years of experience required
No management responsibility
Logo of Ali Tech.
1.高速介面(SerDes)類比電路設計 2.Circuit design of CTLE/CDR/DFE/PLL/TX 3.Familiar with SerDes and DDR PHY architecture (ex: PCIe3 / USB3 / HDMI2 / DDR4 / LPDDR4/4x ...etc)
C++
FPGA
PLL
1.8M ~ 2.3M TWD / year
No management responsibility
Logo of 力智電子股份有限公司.
1. High speed SAR ADC design (>200Msps) 2. High resolution SAR ADC design (14/16-bit) 3. Pipiline ADC design
台元科技園區
55K ~ 80K TWD / month
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
負責 高速 PLL 以及 Serdes 相關類比電路開發。 設計PCIe/USB/SATA相關APHY serdes電路,例如:USB4、PCIe5、25G serdes
ADC/DAC/Serds/PLL/LDO/BG/DP/HDMI/USB
USB4、PCIe5、25G serdes
PLL
2.5M ~ 4.5M TWD / year
3 years of experience required
No management responsibility

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