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Logo of Alpha & Omega Semiconductor (Taiwan) Ltd. .
1) DCDC Power IC design 2) Over 3~5 years experience in design house. power management is a must. 3) Review colleague's projects and own projects.
2M ~ 3M TWD / year
No management responsibility
Logo of Ali Tech.
1.Front-End/Modem (Baseband) Architecture Design for WiFi6/BT/BLE systems; 2.Optimization of Frontend/Modem circuits and simulation/verifications; 3.Digital Circuit Design and Verification – RTL Coding/Synthesis/STA/…
C++
FPGA
ASIC
1.8M ~ 2.3M TWD / year
No management responsibility
Logo of Ali Tech.
1.高速介面(SerDes)類比電路設計 2.Circuit design of CTLE/CDR/DFE/PLL/TX 3.Familiar with SerDes and DDR PHY architecture (ex: PCIe3 / USB3 / HDMI2 / DDR4 / LPDDR4/4x ...etc)
C++
FPGA
PLL
1.8M ~ 2.3M TWD / year
No management responsibility
Logo of 通嘉科技 Leadtrend.
【工作內容】 1. 負責類比電源IC之設計/模擬/驗證/除錯 2. 管控類比電源IC之設計/模擬/驗證/除錯..等流程,追蹤相關流程進度 3. 撰寫各設計流程之設計/除錯分析報告 *意
60K+ TWD / month
No management responsibility
Logo of NVIDIA.
We are now hiring for a Senior Mixed-signal Design Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can
Verilog
Mixed-Signal
PLL
5 years of experience required
No management responsibility
Logo of 力智電子股份有限公司.
1. High speed SAR ADC design (>200Msps) 2. High resolution SAR ADC design (14/16-bit) 3. Pipiline ADC design
台元科技園區
55K ~ 80K TWD / month
No management responsibility
Logo of Ali Tech.
1. 具Bluetooth系統設計分析 2. Bluetooth產品設計專案規劃 3. 專案開發技術指導 4. 客戶參訪,技術方案支持及推廣
C++
Verilog
FPGA
1.8M ~ 2.3M TWD / year
No management responsibility
Logo of Texas Instruments 德州儀器工業股份有限公司.
Responsibilities include: Perform lot and equipment dispositions to support the continuous flow of production and to minimize cycle time in a high volume manufacturing 300mm wafer Fab running Analog Technologies Identify systematic problems in either process or equipment related sources and communicating findings to the engineering staff in a continuous manner Support the manufacturing ramp with execution of equipment/process startup, process experiments (SWRs) Participate in data analysis and p
1M+ TWD / year
No requirement for relevant working experience
No management responsibility
Logo of Dell Technologies.
**歡迎身心障礙者投遞履歷 2024 Server BIOS Firmware Engineer Summer Intern State-of-the-art products demand state-of-the-art firmware, and that’s the role of our Firmware Engineering team. We lead and deliver the analysis, design, programming, debugging, troubleshooting or modification of software for firmware applications. Our team oversees programming activities involving analog and digital hardware as well as software operating systems. We also influence product
40K+ TWD / month
No requirement for relevant working experience
No management responsibility
Logo of Dell Technologies.
**歡迎身心障礙者投遞履歷 2024 Server BIOS Firmware Engineer Summer Intern State-of-the-art products demand state-of-the-art firmware, and that’s the role of our Firmware Engineering team. We lead and deliver the analysis, design, programming, debugging, troubleshooting or modification of software for firmware applications. Our team oversees programming activities involving analog and digital hardware as well as software operating systems. We also influence product
40K+ TWD / month
No requirement for relevant working experience
No management responsibility

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