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Logo of 力旺電子 eMemory.
歡迎至力旺招募官網註冊,直接投遞履歷: https://recruit.ememory.com.tw/ 1. 密碼演算法開發 2. 數位電路設計 (RTL) 3. 數位電路驗證 (UVM) 4. FPGA建置整合及驗證 -------------------------------------------------------------------------- 1. Crypto algorithm development 2. RTL design 3. UVM verification 4.
Linux
UNIX
40K+ TWD / month
3 years of experience required
No management responsibility
Logo of 晶豪科技 ESMT.
1. 設計感測處理器晶片的數位電路: 1) FIR/IIR digital filter design and implementation. 2) 32bit MCU AHB/DMA/UART/I2C/SPI/Timer/RTC/WDT/PIT/GPIO design. 3) digital/analog integration and co-simulation . 4) MAC design and optimization. 5) sensor algorithm development. 2. 開發測試程式: 數位
60K ~ 200K TWD / month
1 years of experience required
No management responsibility
Logo of 保德信國際人壽保險股份有限公司(總公司).
1. 銀行通路業務輔導與業績達成 2. 保險商品教育訓練 3. 保險銷售說明會規劃主持 4. 通路及客戶申訴案件協同處理
IC
輔銷
桃園
新竹
50K ~ 70K TWD / month
Logo of 浦飛爾科技有限公司.
1.Familiar with RTL design & simulation 2.Familiar with FPGA prototype & emulation 3.Familiar with Verilog coding & ASIC design flow 4.Familiar with Analog and digital co-simulation 5.Familiar with Design documentation 6.Experience in MCU 7.Experience in ADC/DAC is a plus 8.Experience in low poer design flow is a plus 孰悉以下工具: 熟悉 Verilog coding, 與 ASIC design flow 熟悉
780K ~ 2.34M TWD / year
No management responsibility
Logo of Alpha & Omega Semiconductor (Taiwan) Ltd. .
1) DCDC Power IC design 2) Over 3~5 years experience in design house. power management is a must. 3) Review colleague's projects and own projects.
2M ~ 3M TWD / year
No management responsibility
Logo of Ali Tech.
1.高速介面(SerDes)類比電路設計 2.Circuit design of CTLE/CDR/DFE/PLL/TX 3.Familiar with SerDes and DDR PHY architecture (ex: PCIe3 / USB3 / HDMI2 / DDR4 / LPDDR4/4x ...etc)
C++
FPGA
PLL
1.8M ~ 2.3M TWD / year
No management responsibility
Logo of 通嘉科技 Leadtrend.
【工作內容】 1. 負責類比電源IC之設計/模擬/驗證/除錯 2. 管控類比電源IC之設計/模擬/驗證/除錯..等流程,追蹤相關流程進度 3. 撰寫各設計流程之設計/除錯分析報告 *意
60K+ TWD / month
No management responsibility
Logo of 瑄品股份有限公司.
1.負責專案進度管理 2.如有PMP執照及工作經驗兩年以上尤佳。 我們從事一流的軟體、人工智慧AI、以及大型智慧專案 來這裡,你會發現與一群具有工作熱誠的高手一起工作,是人生一大樂事
專案管理
台北
PM
信義區
45K ~ 75K TWD / month
Logo of 力智電子股份有限公司.
1. High speed SAR ADC design (>200Msps) 2. High resolution SAR ADC design (14/16-bit) 3. Pipiline ADC design
台元科技園區
55K ~ 80K TWD / month
No management responsibility
Logo of 印正有限公司 Yins Corp.
The HW system application engineer is responsible for IC verification system platform development which is used for CMOS image sensor applications. Responsibilities include HW system circuit design, layout and manufacturing for IC characterization and verification. 需出差,一年累積時間未定。
40K ~ 200K TWD / month
3 years of experience required
No management responsibility

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