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Logo of CakeResume Headhunting Recruitment Service.
Maintain and integrate PCIe/ USB3.2/USB4/ related IP and peripheral design. Verify PCIe/ USB3.2/USB4 related IP.
UVM
Verilog
RTL
2M ~ 4M TWD / year
3 years of experience required
No management responsibility
Logo of Morgan Philips Group.
【工作內容】 1. SoC level and IP level verification methodology 2. Develop a verification plan and Integrated verification environment 3. Integrate VIP into the SOC verification platform.
UVM
Verilog
Verification
Regular earnings reach NT$40,000
2 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
2.5M ~ 3.5M TWD / year
5 years of experience required
No management responsibility
Logo of Ali Tech.
1. 具Bluetooth系統設計分析 2. Bluetooth產品設計專案規劃 3. 專案開發技術指導 4. 客戶參訪,技術方案支持及推廣
C++
Verilog
FPGA
1.8M ~ 2.3M TWD / year
No management responsibility
Logo of NVIDIA.
NVIDIA is seeking outstanding entry-level Verification Engineers to verify the design and implementation of the next generation of PCI Express controllers for the world’s leading GPUs and SOCs by developing scalable testbench that is re-usable across different verification methodologies and environments. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing fiel
PCIE
ASIC
Verilog
2 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
1. SoC level and IP level verification methodology 2. Develop a verification plan and Integrated verification environment 3. Integrate VIP into the SOC verification platform.
UVM
Verification
PCIe
2M ~ 4M TWD / year
5 years of experience required
No management responsibility
Logo of Ali Tech.
1.Front-End/Modem (Baseband) Architecture Design for WiFi6/BT/BLE systems; 2.Optimization of Frontend/Modem circuits and simulation/verifications; 3.Digital Circuit Design and Verification – RTL Coding/Synthesis/STA/…
C++
FPGA
ASIC
1.8M ~ 2.3M TWD / year
No management responsibility
Logo of Edom Technology 益登科技股份有限公司.
1. Assist customers in product development, problem analysis and technical solutions, eg. review schematic and layout 2. Responsible for project technical support of related product lines to assist customers in the smooth introduction of mass production; 3. Assist business to develop product application market; 4. Solve customer problems and meet customer needs; 5. Actively participate in team collaboration and achieve common goals of the team.
Electrical Engineering
FAE
Technical support
50K ~ 70K TWD / month
No requirement for relevant working experience
No management responsibility
Logo of WASAI Technology.
* Design and develop OpenCL/HLS/CUDA algorithms for HPC platform. * Defines and documents OpenCL/HLS/CUDA algorithms required for emulation/FPGA. * Tests and debugs the emulation/FPGA model and collaterals. * Develops improvements to usability by digital circuit validation and debugging of failing tests on the emulation platform. *You will join a growing team of digital IC design engineering professionals and have a real opportunity to have your hardware solutions
C
C++
OpenCL
80K ~ 150K TWD / month
No requirement for relevant working experience
No management responsibility
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. Experience with microprocessor architecture. Preferred qualifications: Master's degree or PhD in Electrical Engineering or Computer Science. Experience with modern pro
Regular earnings reach NT$40,000

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