【工作內容】
1. SoC level and IP level verification methodology
2. Develop a verification plan and Integrated verification environment
3. Integrate VIP into the SOC verification platform.
【需求條件】
1.碩士以上資訊工程、電機電子工程相關畢,5年以上相關工作經驗
2. Familiar with high speed (PCIE, USB, HDMI, DP) protocol and architecture
3. Knowledge and design experience in design verification, such as UVM/VMM/OVM and system Verilog / Verilog.
4. Scripting experience in Shell, Perl, Python
5. Knowledgeable in DDR/JPEG/H.264/H.265 is a plus.
Morgan Philips is a global talent solutions provider with over 600 consultants in 22 countries. Founded in 2013 in Paris, we've grown rapidly through the opening of new offices in key locations. In Asia, we have close to 150 employees across 8 offices and provide top-quality services across 15 industries to over 1000 clients. We leverage our powerful global database, Club5000 network, and research centers staffed by talent mapping experts to provide unparalleled access to top-tier talent for our clients.
Asia Offices:
Singapore, Hong Kong, Taiwan, Shanghai, Beijing, Guangzhou, Shenzhen, and Zhuhai.
Our Brand in Taiwan:
Morgan Philips Executive Search, Fyte