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Speed Interview – Summer 2019
✨Garmin 為什麼這麼厲害！✨ 最早從GPS衛星導航B2B崛起，從航空領域延伸至航海、汽車導航，稱霸陸海空✈️🚢🚗，再轉入戶外休閒健身穿戴式裝置的B2C市場，利基市場做到全球第一☝🏻同時打入汽車前裝市場，成為tier 1供應商🚙 【部門說明】 Garmin 近年來致力於...
Updated 1 day ago1M ~ 1.5M TWD / year
Omlet Arcade 美商歐姆雷特股份有限公司台灣分公司
我們是來自矽谷的新創公司，宗旨是打造最大的手遊社群平台，團隊主要來自美國與台灣。兩年前推出Omlet Arcade手遊社群平台，提供了遊戲直播、戰隊、社交、多人互動等服務。短短兩年就有2000萬的用戶，每個月的手遊直播量超過350萬，社群的文章數量破千萬，使用者的聊天訊息高...
Updated 3 months ago70K ~ 120K TWD / month
10K TWD Signing Bonus 10K TWD Invitation Bonus
1. 熟悉I2C, UART, SPI, GPIO, PWM, ethernet, HDMI…之應用2. 韌體模組化和應用程式開發3. 擅長C/C++、RTL code (Verilog HDL, VHDL) 等程式語言及測試除錯能力4. 了解 Xilinx FPGA / MPU / MCU 並撰寫相關程式5. 熟悉感測元件的整合應用...
Updated 1 day ago40K ~ 60K TWD / month
* Design and develop RTL for Big Data platform. * Defines and documents RTL changes required for emulation/FPGA. * Tests and debugs the emulation/FPGA model and collaterals. * Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform. *You will join a growing team of IC design engineering professionals and have a real opportunity to have your hardware solutions embraced and to demonstrate your coaching and mentoring skills. *There is enormous potential for you...
Updated 4 days ago50K ~ 80K TWD / month
This internship shall last at least 4 months at full-time or 2-4 days per week part-time. Please make sure you will be able to complete this period before sending your application. * Studying and developing RTL code using VHDL or Verilog to accelerator kernels for Big Data platforms * System debug & Validation of FPGA prototype systems * Performance analysis and tuning of workloads on heterogeneous platform...
Updated 4 days ago150 ~ 300 TWD / hour
* Design and develop CUDA/OpenCL/HLS algorithms for HPC platform. * Defines and documents CUDA/OpenCL/HLS algorithms required for emulation/FPGA. * Tests and debugs the emulation/FPGA model and collaterals. * Develops improvements to usability by digital circuit validation and debugging of failing tests on the emulation platform. *You will join a growing team of digital IC design engineering professionals and have a real opportunity to have your hardware solutions embraced andto demonstrate your coaching and mentoring skills. *There is...
Updated 4 days ago50K ~ 100K TWD / month
* Design and develop OpenCL/HLS/CUDA algorithms for HPC platform. * Defines and documents OpenCL/HLS/CUDA algorithms required for emulation/FPGA. * Tests and debugs the emulation/FPGA model and collaterals. * Develops improvements to usability by digital circuit validation and debugging of failing tests on the emulation platform. *You will join a growing team of digital IC design engineering professionals and have a real opportunity to have your hardware solutions embraced and to demonstrate your coaching and mentoring skills. *There...
Updated 4 days ago50K ~ 100K TWD / month
as one of the key IPs in many complex SoC. You'll work closely with analog designers and system architects to independently come up with micro-architecture specification and refine adaptation algorithms. You'll then implement the RTL in System Verilog, define test cases that will deeply verify the design and carry out test creations. Next is to define and build constraints for synthesis and drive for timing closure. In addition to RTL design, you'll need to understand the...
Updated 21 days ago40K+ TWD / month
Job Statement: The Senior FPGA (Design) Engineer will work at the system architecture level in multiple areas of the system as an expert in one or more significant technology domains and will serve as a technical expert in designing, developing, and testing software for optical transport cards using FPGAs (embedded processors) that carry a variety of data types....
Updated about 1 month ago60K ~ 150K TWD / month
工作內容： 1. FPGA firmware design (VHDL/Verilog) 2. IP usage and integration . 3. High Speed interface development. 4. Digital circuit design and analyze. 5. Issue analysis and solution. 6. Research and design for new technology. ...
Updated 3 months ago45K ~ 80K TWD / month
工作內容： FPGA firmware design (VHDL/Verilog) IP usage and integration . High Speed interface development. Digital circuit design and analyze. Issue analysis and solution. IP Core algotronix provides Advanced Encryption Standard (AES) IP cores targetted to FPGAs Timing constraint and Timing Analysis ((Propagation Delay Constraint Inequalities) Research and design for new technology. ...
Updated 3 months ago60K ~ 100K TWD / month
