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Taiwan
Mid-Senior level
Logo of Nahimic/SteelSeries.
Senior Software Engineer in Taipei Employment Type: Permanent Contract JOB DESCRIPTION SteelSeries is a leader in gaming peripherals focused on quality, innovation and functionality, and the fastest growing major gaming headset brand globally. Founded in 2001, SteelSeries improves performance through first-to-market innovations and technologies that enable gamers to play harder, train longer, and rise to the challenge. SteelSeries is a pioneer supporter of competitive gaming tournaments and eSpo
C++
C#
Python
信義區
林口區
1.2M ~ 1.5M TWD / year
Logo of CakeResume Headhunting Recruitment Service.
Product platform HW system design integration Schematic design, PCB layout design and review RFQ/PRD research and feedback Component survey and technology study BOM creation and maintenance Circuit/system design developing , validation and debugging.
audio
Hardware Design
1.6M ~ 1.8M TWD / month
10 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
Design, develop, code, and debug BMC Firmware by applying knowledge of server hardware architecture and system design. Maintain existing systems, includes resolving issues from customer/FAE. Study BMC firmware specifications and configuration requirements to plan and develop reliability and compatibility. Run test/unit test to ensure firmware quality Engage various cross-team validation organizations. [Knowledge, Skills, and Abilities] Understanding of Linux OS. Experience of Linux driver and ap
Firmware
BMC
Server
1.5M ~ 2M TWD / year
5 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
[Responsibilities and Essential Functions] Design, develop, code, and debug BMC Firmware by applying knowledge of server hardware architecture and system design. Maintain existing systems, includes resolving issues from customer/FAE. Study BMC firmware specifications and configuration requirements to plan and develop reliability and compatibility. Run test/unit test to ensure firmware quality Engage various cross-team validation organizations.
BIOS
1.2M ~ 2M TWD / year
4 years of experience required
No management responsibility
Logo of Foreign Professional Talent Recruitment in Taiwan.
Design, develop, code, and debug BMC Firmware by applying knowledge of server hardware architecture and system design. Maintain existing systems, includes resolving issues from customer/FAE. Study BMC firmware specifications and configuration requirements to plan and develop reliability and compatibility. Run test/unit test to ensure firmware quality Engage various cross-team validation organizations. [Knowledge, Skills, and Abilities] Understanding of Linux OS. Experience of Linux driver and ap
1.5M ~ 2M TWD / year
5 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
工作內容 Knowledge of System Verilog, digital simulation and debug. Exposure to UVM is desired. Familiar with USB design is a plus. DV Experience: 6~10 years 薪資架構 13個月計算, RSU 另計
Design Verification
DV
Systemverilog
4M ~ 5M TWD / year
6 years of experience required
Managing 1-5 staff
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工作內容 Responsible for leading a team to develop and maintain the QNAP BIOS/EC/MCU project. Capable of developing unique feature based on hardware or PM specification. Define the platform validation plan and develop necessary debugging and test tools. Willing to deep dive into specific domain technologies or new hardware feature and arrange related technical training courses. Work across different HW and SW teams to identify and resolve technical issues. ‌
BIOS
Manager
FW
1.8M ~ 2.2M TWD / year
5 years of experience required
Managing 5-10 staff
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Camera Platform BSP porting & debug. Camera device driver porting & debug 3rd party SW integration Design and maintain manufacture test tool & debug
Firmware
FW
1.8M ~ 2M TWD / year
5 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
1.Creating verification plans of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios. 2.Create verification environments using SystemVerilog, SystemC or UVM. 3.Identify and write all types of coverage measures for stimulus and corner-cases. 4.Debug tests with design engineers to deliver functionally correct design blocks. 5. Close coverage measures to identify verification holes and to sh
SystemC
RTL
SOC
3M ~ 4M TWD / year
10 years of experience required
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
BIOS/coreboot development and maintenance. Co-work & debug BIOS issue with hardware engineer. BIOS feature porting. Embedded x86 system integration.
Firmware
FW
1.3M ~ 1.8M TWD / year
5 years of experience required
No management responsibility

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