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Mid-Senior level
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Lead the top-level integration of analog IPs, encompassing projects related to SSD, UFS, eMMC, SD, and more. Demonstrate a solid understanding of basic analog circuit design concepts, including but not limited to LDO, DCDC, BANDGAP, Voltage Detector, PLL, ADC, etc. Assist in conducting fail sample analysis and perform IC measurements to contribute to the identification and resolution of issues. If you have a background in analog IP integration, possess a strong grasp of analog circuit design
2M ~ 4M TWD / year
3 years of experience required
No management responsibility
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進行PCB的層層堆疊阻抗設計及SI/PI模擬分析。 撰寫版面設計指南並執行版面品質檢查。 審核並排除訊號量測問題
SIPI
signal&power integrity
Signal Integrity
1.2M ~ 2.8M TWD / year
2 years of experience required
No management responsibility
Logo of ASML Taiwan 台灣艾司摩爾.
Job Title D&E - DUV Reticle Handler Electrical Design Engineer - Linkou Degree: Master Work Experience: 10-15 years, 4-9 years Travel: 25% Workplace Types: On-Site Job Description: Introduction to the job Within ASML, the Satellite D&E team (based in TW) works closely with counterparts located in ASML Wilton office in CT, US, and is responsible for the products including YS Sensor, DUV and EUV modules. The team is also the representative of the Wilton D&E
Regular earnings reach NT$40,000
No requirement for relevant working experience
No management responsibility
Logo of ASML Taiwan 台灣艾司摩爾.
Introduction to the job System integration engineer is acting a role to be responsible for new product introduction from Proto phase to Pilot phase. He also acts as an expert to hold system level performance improvement project and treat system level issues. Role and responsibilities Speed up new product introduction process. System performance enhancement System performance sustaining High Voltage module related issue trouble shooting (i.e. system noise and module failure analysis) System proje
Regular earnings reach NT$40,000
No requirement for relevant working experience
No management responsibility
Logo of 凌耀科技股份有限公司.
1. Sensor IC/ Mixed Signal IC Design, Verification, Design/Verification related documents writing: -Familiar with Hspice, Matlab simulation tools. -Familiar with ADC/DAC, Bandgap, Regulator, Filter, and so on related IP design is preferred. -Interesting in Ambient light sensor, Proximity sensor, Long wave length Infrared sensor, Humidity sensor design is preferred. -Familiar with basic semiconductor process is preferred. 2. Support Mass Production Testing 3. Design Document/Report Support
26.4K ~ 26.4K TWD / month
5 years of experience required
No management responsibility
Logo of Morgan Philips Group.
Job Responsibilities: Engage in RTL/Digital circuit design, synthesis, and simulation/verification. Conduct FPGA synthesis and verification processes. Manage chip integration, algorithm implementation, and interface design. Generate test patterns.
1M ~ 3M TWD / year
3 years of experience required
No management responsibility
Logo of 台聚集團|台聚管理顧問股份有限公司 .
1. 循環經濟專案推動,如熱裂解技術、產業趨勢及用例分析等。 2. 碳中和技術暨專案評估,如氫能、CCUS等新興技術追蹤。 3. 協助再生能源投資開發計畫之評估,如太陽能、風能等項目投資調查及
45K ~ 65K TWD / month
3 years of experience required
No management responsibility
Logo of ASML Taiwan 台灣艾司摩爾.
Introduction to the job New product introduction from proto to pilot System level performance improvement project System level issue treatment Role and responsibilities Speed up new product introduction process System performance enhancement System performance sustaining New product introduction from proto to pilot E-beam System performance enhancement and sustaining. System level issue trouble shooting System project facilitator and management Experimental Design Education and experience PH.D.
Regular earnings reach NT$40,000
No requirement for relevant working experience
No management responsibility
Logo of MGT Technologies Ltd..
We are looking for a professional Embedded Software Engineer to execute complete embedded software development lifecycle. The goal is to create scalable and optimized system solution with our MCU/DSP/ADC IP. We need 5 key/lead developers as soon as possible. SALARY NEGOTIABLE for TOP TIER, SENIOR LEVEL ENGINEER Designing and implementing software of embedded devices and systems Designing, developing, coding, testing and debugging system software Analyzing and enhancing efficiency, stability and
C++
C
coding
185K ~ 300K TWD / month
No management responsibility
Logo of Wacom Taiwan Information Co., Ltd.台灣和冠資訊科技股份有限公司.
Job Purpose Responsible for quality evaluation of products at the prototype stage or after mass production, Windows HLK, and always maintains the quality of Technology Solution products at a constant high level. Also provide advice and support to ensure that the engineering team satisfy its quality evaluation standards and Windows HLK requirements. Key Responsibilities: ・Work closely with engineers to evaluate and analyse the quality of developed products at the prototype and mass production sta
excel
microsoft office
word
900K ~ 1.5M TWD / year
3 years of experience required
No management responsibility

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