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Logo of CakeResume Headhunting Recruitment Service.
Leading foundry management product engineering team Enhancing product development and increasing yield through collaboration with the Foundry. Effectively managing all NPI issues across teams, ensuring adherence to schedule and guiding the transition to mass production. Producing meticulously organized characterization reports, analyzing data thoroughly to identify strengths and weaknesses in mass production implementation. Proficiently communicating with customers and vendors, adept at facilita
Product Engineering
CP
FT
350萬 ~ 600萬 TWD / 年
需具備 15 年以上工作經驗
管理 1 ~ 5 人
Logo of Tensorcom.
Tensorcom, a pioneer in developing innovative semiconductors for high-speed millimeter wave, ultra-low power, wireless communication chipsets is looking for a candidate who is interested in developing software tools, drivers, and firmware for its highspeed wireless millimeter wave network communications products. As an experienced S/W designer, you will be expected to have deep knowledge of and experience in one or more major specialty functions of one or more programming languages, OS device dr
4萬+ TWD / 月
需具備 5 年以上工作經驗
不需負擔管理責任
Logo of Tensorcom.
Tensorcom, a pioneer in developing innovative semiconductors for high-speed millimeter wave, ultra-low power, wireless communication chipsets, is looking for a candidate who is interested in working on complex, low power, ASIC designs for our next generation WiGig/IEEE 802.11ad compliant SoCs. The interested candidate will participate in a range of ASIC development activities such as defining the SoC architecture, the development of RTL code, the taping-out of the chip, and the evaluation of
4萬+ TWD / 月
需具備 2 年以上工作經驗
不需負擔管理責任
Logo of Tensorcom.
Tensorcom, a pioneer in developing innovative semiconductors for high-speed millimeter wave, ultra-low power, wireless communication chipsets, is looking for a candidate who is interested in working on complex ASIC designs for our next generation 60GHz, IEEE 802.11ad/WiGig compliant SoCs with specific emphasis on developing RTL code for the digital baseband module. The candidate will participate in a range of ASIC development activities such as defining the digital modem architecture, the evalua
4萬+ TWD / 月
需具備 2 年以上工作經驗
不需負擔管理責任
Logo of NVIDIA.
NVIDIA is looking for a Senior Design Engineer for our Coherent High Speed Interconnect team! The NVLINK-C2C enables the creation of a new class of integrated products with NVIDIA partners, built via chiplets, allowing NVIDIA GPUs, DPUs, and CPUs to be coherently interconnected with custom silicon. To learn more about NVIDIA's ultra-fast chip interconnect technology visit: https://www.nvidia.com/en-us/data-center/nvlink-c2c/ . This
Verilog
TGC Europe
需具備 5 年以上工作經驗
不需負擔管理責任

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