Training * Study PCIe base spec and PHY Interface spec. * Study assertion for analog control sequence check. * Study how to modify CPF to UPF. Work content * PCIe analog model maintain. * PCIe verification with assertion and model. * Modify UPF for low power design. * Modify the SSC macro according to the new specification.

Training * Practice with the ARM Cortex-M System Design Kit - Generate a specific AHB bus with the bus matrix generator. - Use file reader IP to test whether SRAM can be read and written correctly. - Integrate several IP structures into a small SOC (file reader, SRAM, AHB to APB bridge, APB bus, APB mux, timer, UART, GPIO… ). * RISC-V - Practice with RI5CY (PULP platform). - After reading its document, disassemble the CPU part and connect it to the aforementioned bus matrix. - Connect the appropriate AXI to AHB IP between RI5CY (64-bits AXI) and bus matrix (32-bits AHB). - Connect the SRAM to the slave, and use the file reader to verify that it can read and write correctly. * LED driver - Study LED driver specifications and principles. - Study encode / decode principle. - Study Color Correction and Color Mixing Principles. * Study synthesis (Design Compiler) and STA (primetime) related knowledge. Work content  * Design pin mux generator and register files generator with Python. * Collect various BIST principles and algorithms, and practice with RTL code. * Design Discrete Fourier Transform IP - Study the MPP and USI Active Pen Specifications. - Participate in IP architecture design, use Python to simulate system feasibility, and confirm the number of bits required for ALU operations. - After analyzing the architecture, several modules were disassembled, and digital circuits (AHB I/F, FIFOs, ALU) were written in System Verilog. - Compare the results of the Python simulation with the digital circuit to ensure its correct operation.