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車祐成
Engineer
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車祐成

Engineer
Semiconductor Engineer / Electrochemical Energy Storage material Research / X-Ray analysis <Passion / Positive / Communication > Semiconductor Wet clean Process tech 5nm → 3nm High-K metal gate Electrochemical Energy Storage_The material research of Supercapacitor Electrochemical analysis (CV , CP & EIS ) X-ray analysis (XRD , XAS , & XPS)
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Powerchip Semiconductor Manufacturing Corporation
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National Tsing Hua University
台灣桃園

Professional Background

  • Statut Actuel
    Employé
  • Profession
    Process Engineer
  • Fields
    Semi­-conducteur
  • Expérience professionnelle
    2 à 4 ans (2 à 4 ans pertinente)
  • Management
    None
  • Skills
    word
    excel
    powerpoint
  • Languages
    English
    Intermédiaire
    Chinese
    Natif ou Bilingue
  • Highest level of education
    Master

Job search preferences

  • Desired job type
    Temps plein
    Intéressé par le travail à distance
  • Desired positions
    元件工程師
  • Lieu de travail désiré
    Taipei City, Taiwan
    Taoyuan City, Taiwan
    Hsinchu City, Taiwan 300
    Taichung City, Taiwan
  • Freelance
    Je ne suis pas indépendant

Work Experience

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Integration Technology Engineer

nov. 2021 - Présent
300mm Technology Foundry (Transfer and Production Integration ) ■ New Tape out ■ Process and WAT Window tunning ■ Process experiment CIP executing ■ In-line / Defect / WAT / Yield troubleshooting Achievement: (1) Platform improvements were executed through tape out, and pi run were excuted to design experimental splits to meet customer requirements. (2) WAT matching by understanding device characteristics and collaborating with Diffusion module through Design of Experiment (DOE) and the development of online recipe changes. (3) Yield improved~1% through the design of BEOL WET/Thin Film Continuous Improvement Processes (CIP) for defect model improvements in the cleanliness of process equipment.
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Process Engineer

tsmc
Temps plein
mars 2020 - juil. 2021
1 yr 5 mos
MEOL HK Metal Gate Wet Clean Process Engineer from N5 to N3 technology ■Wet clean/etch tool maintenance and Productivity management. ■Inline/Offline SPC management and troubleshooting. ■Co-work with equipment engineer, process integration engineer to solve issues. Achievement: (1) N5 metal gate defect solution by studying the defect physical / chemical properties and designing continuous improvement process (CIP) . (2) Design of Experiment (DOE) for offline wafer Q-time effect issue. (3) New tech N3 tool wet etching rate improvement.
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Research Assistant Student

août 2015 - oct. 2019
4 yrs 3 mos
Research: Electrochemical energy storage material research combined with synchrotron radiation_ X-Ray Diffraction ,X-Ray Absorption Spectroscopy and X-Ray Photospectroscopy analysis. Publication: M.-J. Deng*, K.-W . Chen, Y.-C. Che,I.-J. W ang, C.-M. Lin,J.-M. Chen, K.-T. Lu, Y .-F. Liao, and H. Ishii, ACS Appl. Mater. Interfaces 2017, 9, 479−486 The experience of oversea research: To analyz the material of supercapacitor by using 8 GeV energy synchrotron radiation at Spring-8 in Japan .

Education

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Master of Science (MS)
Department of Engineering and System Science
2017 - 2019
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Bachelor of Science (BS)
Department of Applied Science
2013 - 2017