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鄭人瑋 (Ren-Wei Jheng)
論文 - 基於三維矩陣極化碼的硬體系統架構設計

論文 - 基於三維矩陣極化碼的硬體系統架構設計

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論文 - 基於三維矩陣極化碼的硬體系統架構設計

By鄭人瑋 (Ren-Wei Jheng)
IC設計工程師
・
Taiwan
(硬體-硬體系統架構) 本論文實作出碼長為(243, 121)的三維BP極化碼解碼器，它將具有高硬體使用率、低解碼週期、低解碼時脈以及相對高吞吐量的系統架構。
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鄭人瑋 (Ren-Wei Jheng)
Published: Jun 29th 2020
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