CakeResume Talent Search

Singsi Chen I have 7 years of experience in hardware research and development. Specialize in hardware circuit design. Familiar with the x86/RISC/DCDC power/sensor/DC motor...etc design architecture. Worked in the industrial computer/consumer device/automatic machine and fan motor industries. Expert in Electronics and automatic control. Taipei City, Taiwan Skill Schematic design/PCB layout review Si/Power measurement report review Debug Hardware issue/ Co-work with each function Team、PM and customers Factory mass production process Design Tools : Orcad

Skype's overall quality, including but not limited to: Design and clean code best practices Test and behavior driven development Scaling system testing for large engineering organizations Continuous integration and delivery Lecturer at EPITA Paris, FebruaryJanuary 2016 Part-time teaching operating systems design and kernel programming with the Intel CPU architecture through the Kaneton micro-kernel project for ~90 students. Students are given a codebase with research and educational flavors as a framework to work on their implementation in 3 stages: event and interrupt management, memory management and finally, context switching and multi-tasking. Also, maintaining an automated

Insyde code structureyears experience in BIOS development region with ARM code structure. - Attend Intel/Microsoft Workshop for supporting Dell XPS 13/15 series in NPI phrase. - Expert in cross-functional communication for implementing functions and solving BIOS and factory problems. Skills: - Familiar with UEFI EDKII architecture, AMI/Insyde code base, and C/C++. - Familiar with kinds of debug tools. Such as Intel DCI, WinDbg, DDR memory training data dump, and stress tool. - Expert in Intel x86/x64 architecture and major in ME function. Work Experience BIOS

University M.S. in Aeronautics and Astronautics Engineering, Guidance Navigation and Control Jul 2013 – Aug 2015 PROFESSIONAL EXPERIENCE Airoha Technology Corp. Taipei, Taiwan Senior Software Engineer for GNSS Oct 2018 – Present Providing critical system support to facilitate the build-up process for customer's proprietary algorithm in ARM CM4 (Cortex-M4) with FreeRTOS real-time process Optimized the architecture to meet customer requirements, achieving a ~35% reduction in CPU resources , especially in products with high positioning update rates, particularly designed for automotive applications Integrating GNSS algorithm within CM4 embedded software platform during IC bring-up tasks for

Taipei City, Taiwan [email protected] Software Skills C/C++ googleTest Golang development and test. Linux Git SVN HTML/JavaScript Hardware Skills Altium designer Analog and digital circuit design Firmware Skills C/C++ UART, SPI, I2C, I2S, CAN freeRTOS Arduino ARM IOT Skills Websocket MQTT HTTP TCP, UDP BLE Working Experience Software Engineer • tiSPACE - Dedicated Space Services JanPresent Co-work with Mechanical, Propulsion, Algorithm , RF and Hardware teams to build the rockets. Lead the firmware team members to implement the firmware code. - Design and implement the firmware architecture

MIPI,LVDS,mLVDS,PDI(PHI)interface 3. I2C,SPI interface 4. system ESD improve use digital filter 5. CABC/CE/SLR/sharpness color processing 6. digital team re-build & lead 10 members 7. HD/Full HD resolution 8. CASCADE IC architecture 9. High Speed IO RX Decoder 10. lead digital team MP from 100K/M to 1KK/M(4.5 years） 專案經理/經理 • Sitronix Technology Corporation 八月三月 2013 | Taipei, Taiwan 1. Set/Lead digital team

Kevin Hsu System Software | CoreIP & SoC Verification Engineer Have over 6 years experience in embedded system software development and verification. Have full experience in troubleshooting system level issues especially on RISC-V system. Specialize in RISC-V instruction set architecture. No.18, Ln. 62, Fuqiang W. St., Zhongli Dist., Taoyuan City, Taiwan linkedin.com/in/kevin-hsuWork Experience Engineer II SiFive SepPresent Hsinchu, Taiwan Develop code snippets for random test generator to generate test programs stressing for all the units/modules of core IPs Design and implement self