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Definition of Reputation Credits
Shih Heng Sun
Semiconductor Process Integration Engineer with 5+ years of experience.
TSMC PIE specializing in advanced technology semiconductor products (3nm~10nm). Well-versed in yield improvement of semiconductor manufacturing process, Logic IC yield analysis, and collaborating with production line to solve problems. Making a huge leap for TSMC advanced IC fabrication in process integration and yield improvement. Enthusiastic about semiconductor product development and design which can change people's lives.
Work Experiences
Yield Improvement Engineer • TSMC Fab12B
August 2016 - December 2020
Expert in most advanced Logic IC process (5nm~10nm) and familiar with advanced measuring instruments such as SEM, E-beam and Bright/Dark Field Inspection Tool.
Specialized in detecting defects to improve yield.
Collaborated with EE & PE to refine logic IC manufacturing procedure and lower production cost.
Process Integration Engineer • TSMC Fab12B / TSMC R&D
May 2019 - December 2019 / January 2021 - December 2021
Proficient in analyzing the relationship between chip electrical properties and process problems.
Specialized in using electrical data analysis (3nm~5nm) to improve Logic IC performance
Experienced in hitherto the most advanced semiconductor process (3nm).
Education
2013/09 - 2016/07
National Taiwan University
M.S. Photonics and Optoelectronics
2006/09 - 2010/06
National Taiwan University
B.S. Physics
Graduate Research
Enhancement of Emission Efficiency of Deep-ultraviolet AlGaN Quantum Wells through Surface Plasmon Coupling with an Al Protrusion Array
Skills
- Semiconductor electrical property analysis
- Advanced metrology tools (SEM, DB/DD and E-beam)
- Excellent in problem-solving
- Capable of both working on teams and individual
- Influential communicating and reporting skills
Languages
- English — Fluent
- Chinese — Native
Shih Heng Sun
Semiconductor Process Integration Engineer with 5+ years of experience.
TSMC PIE specializing in advanced technology semiconductor products (3nm~10nm). Well-versed in yield improvement of semiconductor manufacturing process, Logic IC yield analysis, and collaborating with production line to solve problems. Making a huge leap for TSMC advanced IC fabrication in process integration and yield improvement. Enthusiastic about semiconductor product development and design which can change people's lives.
Work Experiences
Yield Improvement Engineer • TSMC Fab12B
August 2016 - December 2020
Expert in most advanced Logic IC process (5nm~10nm) and familiar with advanced measuring instruments such as SEM, E-beam and Bright/Dark Field Inspection Tool.
Specialized in detecting defects to improve yield.
Collaborated with EE & PE to refine logic IC manufacturing procedure and lower production cost.
Process Integration Engineer • TSMC Fab12B / TSMC R&D
May 2019 - December 2019 / January 2021 - December 2021
Proficient in analyzing the relationship between chip electrical properties and process problems.
Specialized in using electrical data analysis (3nm~5nm) to improve Logic IC performance
Experienced in hitherto the most advanced semiconductor process (3nm).
Education
2013/09 - 2016/07
National Taiwan University
M.S. Photonics and Optoelectronics
2006/09 - 2010/06
National Taiwan University
B.S. Physics
Graduate Research
Enhancement of Emission Efficiency of Deep-ultraviolet AlGaN Quantum Wells through Surface Plasmon Coupling with an Al Protrusion Array
Skills
- Semiconductor electrical property analysis
- Advanced metrology tools (SEM, DB/DD and E-beam)
- Excellent in problem-solving
- Capable of both working on teams and individual
- Influential communicating and reporting skills
Languages
- English — Fluent
- Chinese — Native