Yield Improvement Engineer
huge leap for TSMC advanced IC fabrication in process integration and yield improvement. Enthusiastic about semiconductor product development and design which can change people's lives. Work Experiences Yield Improvement Engineer • TSMC Fab12B AugustDecember 2020 Expert in most advanced Logic IC process (5nm~10nm) and familiar with advanced measuring instruments such as SEM, E-beam and Bright/Dark Field Inspection Tool. Specialized in detecting defects to improve yield. Collaborated with EE & PE to refine logic IC manufacturing procedure and lower production cost. Process Integration Engineer • TSMC Fab12B / TSMC R&D MayDecember 2019 /
National Taiwan University・
M.S. Photonics and Optoelectronics