In process control (stability), process capability best practice cross fertilization management. • Promoting yield improvement and systematically feedback information to new product development team, PDCA cycle review. • Actively identify scrap saving opportunities. • Process optimization related to yield loss caused by strict customer requirements and quality case. • Be yield enhancement hub for technical assessment from IC circuit design, wafer manufacturing, assembly, test and OSAT capability evaluation. • Initiate taskforces to drive OSAT on multi-dimensional tasks including customer voice, quality focus, production sustaining. • Lead continuous improvement program to achieve excellent yield and quality performance. • Drive yield
word
powerpoint
Excel
Employed
Full-time / Interested in working remotely
6-10 years
National Chiao Tung University, Hsinchu, Taiwan, Republic of China
吳明赫 Test Equipment Technician Taichung City, Taiwan Passionate about continuous learning and professional growth, good at working effectively under pressure, with 10 years of experience in semiconductor back-end equipment. Demonstrates excellence in equipment maintenance, upkeep, improvements and capability enhancements. 工作經歷 Test Equipment Technician Micron Technology 台灣美光 • 十一月Present # Leadership Daily *improvement Equipment UPH/PPJ/MTBF/SDT/UDT KPI, until meet target *Mentor other equipment engineers in the respective area *Support edit/improve Equipment...OCAP/Procedure/SOP
Shih Heng Sun Semiconductor Process Integration Engineer with 5+ years of experience. TSMC PIE specializing in advanced technology semiconductor products (3nm~10nm). Well-versed in yield improvement of semiconductor manufacturing process, Logic IC yield analysis, and collaborating with production line to solve problems. Making a huge leap for TSMC advanced IC fabrication in process integration and yield improvement. Enthusiastic about semiconductor product development and design which can change people's lives. Work Experiences Yield Improvement Engineer • TSMC Fab12B AugustDecember 2020 Expert in most advanced Logic IC process (5nm~10nm) and familiar with advanced measuring
of about 50,000 players at the same time. 3.Designed a new poker game using .NET Core and also handled the system design. 4.Improved system performance when 30,000 players were online with 100 containers, each with 1 core CPU. Before the enhancement, the CPU loading was at 10%, but after the enhancement, the CPU loading was reduced to 1%. At the same time, used interpolation to reduce data transfer volume to 1/10 of the original data. 5.Promoted to a backend lead and job responsibilities included
Rust
Node.js
TypeScript
Employed
・
Not open to opportunities
Full-time / Interested in working remotely
6-10 years
Fju Jen Catholic University
・
Math
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