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Physical-Design Methodology Engineer/Technical Manager

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Updated 28 days ago

Job Description

  • Co-work w/ foundry/EDA vendors to define best PD imp recipes
  • Explore EDA tool new features and introduce to project team
  • Define proper FOM to project DTCO opportunities
  • Optimize PG structure for best resource and IR/EM concerns, including pillar types, via stacking layers
  • Help project team revise scripts, provide guidelines/checkers to check PD quality and feedback potential issues
  • Build physical-aware timing diagnosis utilities

Requirements

Qualification:

  • 3+ year experiences in Innovus/ICC2
  • TCL programming for APR tools, recipe design experiences
  • Timing bottleneck debug capability
  • Routability estimation/comparison skill
  • Experienced in DRC debug

Preferred qualification:

  • 5+ year APR experiences in tapeout or methodology development
  • PPA boost experiences, data analysis capability
  • Knowledge to perform DTCO and compare knob pros/cons
  • Python programming for data exploration
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3
2 years of experience required
50K ~ 200K TWD / month
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聯發科技成立於1997年,透過持續投資先進製程與前瞻技術,現已成長為全球領先的IC設計公司,提供涵蓋智慧手持裝置、智慧家庭應用、無線連結技術及物聯網產品等多個領域的系統晶片整合解决方案(SoC),並居市場領先地位。聯發科技一年約出貨15億顆晶片落實在上億台的終端產品在全球各地上市。聯發科技提供高度整合與創新性的晶片設計方案,不僅協助製造商優化供應鏈及縮短新產品開發時間,還利於其在全球成熟及發展中市場建立競爭優勢。

聯發科技致力讓科技產品更普及,因為我們相信科技能夠改善人類的生活、與世界連結,每個人都有潛力利用科技創造無限可能(Everyday Genius)。了解更多訊息,請瀏覽:www.mediatek.com.


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